circt/test/firtool
Andrew Young 47bfbee987
[ExportVerilog] Flip the default output of `sv.alwaysComb` ops (#1709)
We have decided that we want the default options in CIRCT to make use of
newer SystemVerilog constructs which improve the quality of output. In
the initial commit for adding a lowering option for `alwaysComb`
printing, we defaulted to print `always_comb` as `always @(*)`. This
flips the default setting and the changes the flag name to
`noAlwaysComb`, which is more in line with our desired output.

This is probably not the end of our efforts to customize the lowering of
`alwaysComb`: `always @(*)` and `always_comb` are not 100% equivalent
and have differences in their behavior at time 0.
2021-09-06 22:44:16 -07:00
..
blackbox-path.v [FIRRTL] Add black box reader pass (#918) 2021-05-21 20:01:58 +02:00
blackbox-resource.v [FIRRTL] Add black box reader pass (#918) 2021-05-21 20:01:58 +02:00
blackbox.mlir [FIRRTL][BlackBoxReader] Stop emitting duplicate blackboxes (#1225) 2021-06-09 17:51:12 -07:00
chirrtl.fir [firtool] move BlackboxMemory before LowerTypes (#1618) 2021-08-21 15:29:04 -07:00
commandline.mlir [firtool] Add split-input-file and verify-diagnostics options 2021-08-06 19:33:17 +02:00
firtool.fir [FIRTOOL] Allow multiple annotation files (#1674) 2021-08-31 09:08:45 -05:00
firtool.fir.anno.1.json [FIRTOOL] Allow multiple annotation files (#1674) 2021-08-31 09:08:45 -05:00
firtool.fir.anno.json [FIRTOOL] Allow multiple annotation files (#1674) 2021-08-31 09:08:45 -05:00
firtool.mlir [FIRRTL] Add Port Direction (#992) 2021-05-09 02:03:54 -04:00
optimizations.fir Whitespace cleanup in test/ and *.td, NFC 2021-07-09 18:24:57 -04:00
phase-ordering.fir enable lower-types by default (#1086) 2021-05-19 14:00:13 -05:00
split-verilog.mlir [ExportVerilog] Print extern modules to only one file in split files mode. 2021-08-27 22:16:05 -07:00
style.fir [ExportVerilog] Flip the default output of `sv.alwaysComb` ops (#1709) 2021-09-06 22:44:16 -07:00