mirror of https://github.com/llvm/circt.git
80 lines
3.0 KiB
Plaintext
80 lines
3.0 KiB
Plaintext
; Check this design makes it through firtool.
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; RUN: firtool %s --no-dedup
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; RUN: firtool %s --no-dedup --preserve-aggregate=all --scalarize-public-modules=false
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; Check parsing into open aggregates.
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; RUN: circt-translate -import-firrtl -verify-diagnostics -split-input-file %s | circt-opt | FileCheck %s
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; CHECK-LABEL: circuit "Bundle"
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FIRRTL version 4.0.0
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circuit Bundle :
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; CHECK-LABEL: module private @Child
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; CHECK-SAME: in %in: !firrtl.bundle
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; CHECK-SAME: out %r: !firrtl.probe<
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module Child :
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input in : {a : UInt<1>, b : UInt<1>[2]}
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output r : Probe<{a : UInt<1>, b : UInt<1>[2]}> ; probe of bundle (of UInt, vec)
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define r = probe(in)
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; CHECK-LABEL: module private @Probe
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; CHECK-SAME: in %in: !firrtl.bundle<
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; CHECK-SAME: out %r: !firrtl.openbundle<a: probe<bundle<a: uint<1>, b: vector<uint<1>, 2>>>, b: probe<bundle<a: uint<1>, b: vector<uint<1>, 2>>>>,
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; CHECK-SAME: out %mixed: !firrtl.openbundle<a: uint<1>, x flip: openvector<openbundle<p flip: probe<bundle<a: uint<1>, b: vector<uint<1>, 2>>>, data flip: uint<1>>, 2>, b: vector<uint<1>, 2>>,
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; CHECK-SAME: out %nohw: !firrtl.openbundle<x: openvector<openbundle<p: probe<bundle<a: uint<1>, b: vector<uint<1>, 2>>>>, 2>>) {
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; CHECK: opensubfield
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; CHECK: opensubindex
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module Probe :
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input in : {a : UInt<1>, b : UInt<1>[2]}
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output r : {a : Probe<{a : UInt<1>, b : UInt<1>[2]}>, b : Probe<{a : UInt<1>, b : UInt<1>[2]}>} ; bundle of probes of bundles (of UInt, vec)
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output mixed : {a : UInt<1>,
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flip x : {flip p: Probe<{a : UInt<1>,
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b : UInt<1>[2]
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}>,
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flip data: UInt<1>
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}[2],
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b : UInt<1>[2]} ; mixed
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output nohw : {x : {p: Probe<{a : UInt<1>, b : UInt<1>[2]}>}[2]} ; non-hw-only
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inst c1 of Child
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inst c2 of Child
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connect c1.in, in
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connect c2.in, in
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define r.a = c1.r
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define r.b = c2.r
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connect mixed.a, read(c1.r.a)
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connect mixed.b, read(c1.r.b)
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define mixed.x[0].p = c1.r
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define mixed.x[1].p = c2.r
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connect mixed.x[0].data, read(c1.r.a)
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connect mixed.x[1].data, read(c2.r.a)
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define nohw.x[0].p = c1.r
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define nohw.x[1].p = c2.r
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; CHECK-LABEL: module @Bundle
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; CHECK: opensubfield
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; CHECK: opensubindex
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public module Bundle:
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input in : {a : UInt<1>, b : UInt<1>[2]}
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output out1 : {a : UInt<1>, b : UInt<1>[2]}
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output out2 : {a : UInt<1>, b : UInt<1>[2]}
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output out3 : {a : UInt<1>, b : UInt<1>[2]}
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output out4 : {a : UInt<1>, b : UInt<1>[2]}
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output out5 : {a : UInt<1>, b : UInt<1>[2]}
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output out6 : {a : UInt<1>, b : UInt<1>[2]}
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output out7 : {a : UInt<1>, b : UInt<1>[2]}
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inst p of Probe
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connect p.in, in
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; Resolve probes
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connect out1, read(p.r.a)
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connect out2, read(p.r.b)
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connect out3, read(p.mixed.x[0].p)
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connect out4, read(p.mixed.x[1].p)
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connect out5, read(p.nohw.x[0].p)
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connect out6, read(p.nohw.x[1].p)
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connect out7.a, p.mixed.a
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connect out7.b, p.mixed.b
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