mirror of https://github.com/llvm/circt.git
133 lines
3.5 KiB
Plaintext
133 lines
3.5 KiB
Plaintext
; RUN: firtool %s | FileCheck %s --implicit-check-not FILE
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; This test checks output directory behavior of circuits with layers with other
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; features. Generally, layer code is treated as "verification" code and should
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; be kept out of the design area when `firtool` is run with options where the
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; design area is explicitly specified.
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;
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; This test is expected to eventually be removed once the FIRRTL ABI switches to
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; using filelists or manifests and a flat output directory structure.
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FIRRTL version 4.0.0
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circuit Testbench: %[[
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{
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"class": "sifive.enterprise.grandcentral.ViewAnnotation",
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"name": "MyView",
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"companion": "~Testbench|GrandCentral",
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"parent": "~Testbench|Testbench",
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"view": {
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"class": "sifive.enterprise.grandcentral.AugmentedBundleType",
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"defName": "Interface",
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"elements": [
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{
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"name": "uint",
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"description": "a wire called 'uint'",
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"tpe": {
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"class": "sifive.enterprise.grandcentral.AugmentedGroundType",
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"ref": {
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"circuit": "Testbench",
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"module": "DUT",
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"path": [],
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"ref": "a",
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"component": []
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},
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"tpe": {
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"class": "sifive.enterprise.grandcentral.GrandCentralView_UnknownGroundType_"
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}
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}
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}
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]
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}
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},
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{
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"class": "sifive.enterprise.grandcentral.ExtractGrandCentralAnnotation",
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"directory": "gct",
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"filename": "gct/bindings.sv"
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},
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{
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"class":"firrtl.transforms.DontTouchAnnotation",
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"target":"~Testbench|DUT>a"
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},
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{
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"class":"firrtl.transforms.DontTouchAnnotation",
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"target":"~Testbench|Foo>a"
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},
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{
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"class":"firrtl.transforms.DontTouchAnnotation",
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"target":"~Testbench|Bar>a"
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},
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{
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"class":"firrtl.transforms.DontTouchAnnotation",
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"target":"~Testbench|Baz>a"
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},
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{
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"class":"firrtl.transforms.DontTouchAnnotation",
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"target":"~Testbench|Qux>a"
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},
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{
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"class":"firrtl.transforms.DontTouchAnnotation",
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"target":"~Testbench|Quz>a"
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},
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{
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"class": "sifive.enterprise.firrtl.MarkDUTAnnotation",
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"target": "~Testbench|DUT"
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},
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{
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"class": "sifive.enterprise.firrtl.TestBenchDirAnnotation",
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"dirname": "verification/testbench"
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}
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]]
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layer A, bind, "verification/testbench":
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module Foo:
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node a = UInt<1>(0)
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module Bar:
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node a = UInt<1>(1)
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module Baz:
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node a = UInt<2>(2)
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module Qux:
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node a = UInt<2>(3)
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module Quz:
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node a = UInt<3>(4)
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module GrandCentral:
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inst qux of Qux
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inst quz of Quz
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public module DUT:
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inst foo of Foo
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inst baz of Baz
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inst grandCentral of GrandCentral
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node a = UInt<3>(4)
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layerblock A:
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inst bar of Bar
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inst bazz of Baz
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inst quz of Quz
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public module Testbench:
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inst dut of DUT
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; The only modules NOT in a file are Foo, Baz, and DUT.
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;
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; CHECK: module Foo();
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; CHECK: module Baz();
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; CHECK: module DUT();
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; The following modules are all in the Testbench directory.
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;
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; CHECK-DAG: FILE "verification{{[/\]}}testbench{{[/\]}}layers-Testbench-A.sv"
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; CHECK-DAG: FILE "verification{{[/\]}}testbench{{[/\]}}Bar.sv"
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; CHECK-DAG: FILE "verification{{[/\]}}testbench{{[/\]}}DUT_A.sv"
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; CHECK-DAG: FILE "verification{{[/\]}}testbench{{[/\]}}Testbench.sv"
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; The following modules are all in the Grand Central directory.
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;
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; CHECK-DAG: FILE "gct{{[/\]}}GrandCentral.sv"
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; CHECK-DAG: FILE "gct{{[/\]}}Interface.sv"
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; CHECK-DAG: FILE "gct{{[/\]}}Qux.sv"
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; CHECK-DAG: FILE "gct{{[/\]}}Quz.sv"
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; CHECK-DAG: FILE "gct{{[/\]}}bindings.sv"
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