mirror of https://github.com/llvm/circt.git
39 lines
844 B
Plaintext
39 lines
844 B
Plaintext
; RUN: firtool %s | FileCheck %s
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FIRRTL version 4.0.0
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; Check use of colored rwprobe in enablelayers.
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; Check rwprobe of hardware in a layer.
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; Order isn't critical, but for simplicity just check lines.
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; CHECK: module TH();
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; CHECK-NEXT: `ifndef SYNTHESIS
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; CHECK-NEXT: initial
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; CHECK-NEXT: force TH.d.t.w = 1'h1;
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; CHECK-NEXT: `endif // not def SYNTHESIS
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; CHECK-NEXT: DUT d ();
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; CHECK-NEXT: endmodule
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; CHECK: module DUT_T();
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; CHECK-NEXT: wire w = 1'h0;
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; CHECK-NEXT: endmodule
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;
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; CHECK: module DUT();
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; CHECK-NEXT: endmodule
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circuit TH:
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layer T, bind:
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public module TH enablelayer T:
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inst d of DUT
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force_initial(d.p, UInt<1>(1))
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public module DUT:
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output p : RWProbe<UInt<1>, T>
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layerblock T:
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wire w : UInt<1>
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connect w, UInt<1>(0)
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define p = rwprobe(w)
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