mirror of https://github.com/llvm/circt.git
39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
; RUN: firtool %s --parse-only --select-instance-choice=Platform=ASIC | FileCheck %s
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; RUN: firtool %s --ir-hw --disable-opt --select-instance-choice=Platform=ASIC | FileCheck %s --check-prefix=ASIC
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; RUN: firtool %s --ir-hw --disable-opt --select-default-for-unspecified-instance-choice | FileCheck %s --check-prefixes=DEFAULT
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FIRRTL version 4.2.0
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; CHECK: firrtl.circuit "Foo" attributes {select_inst_choice = ["Platform=ASIC"]} {
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circuit Foo:
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; CHECK: firrtl.option @Platform
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option Platform:
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; CHECK-NEXT: @FPGA
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FPGA
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; CHECK-NEXT: @ASIC
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ASIC
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module DefaultTarget:
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input clock: Clock
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module FPGATarget:
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input clock: Clock
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module ASICTarget:
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input clock: Clock
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public module Foo:
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input clock: Clock
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; CHECK: %inst_clock = firrtl.instance_choice inst interesting_name @DefaultTarget
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; CHECK-SAME: alternatives @Platform {
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; CHECK-SAME: @FPGA -> @FPGATarget,
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; CHECK-SAME: @ASIC -> @ASICTarget
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; CHECK-SAME: } (in clock: !firrtl.clock)
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; ASIC: hw.instance "inst" @ASICTarget
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; DEFAULT: hw.instance "inst" @DefaultTarget
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instchoice inst of DefaultTarget, Platform :
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FPGA => FPGATarget
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ASIC => ASICTarget
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connect inst.clock, clock
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