mirror of https://github.com/llvm/circt.git
68 lines
2.5 KiB
Plaintext
68 lines
2.5 KiB
Plaintext
; RUN: firtool %s --format=fir | FileCheck %s
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FIRRTL version 4.0.0
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circuit DPI:
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; CHECK-LABEL: `ifndef __CIRCT_DPI_IMPORT_CLOCKED_RESULT
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; CHECK-NEXT: import "DPI-C" context function void clocked_result(
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; CHECK-NEXT: input byte foo,
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; CHECK-NEXT: bar,
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; CHECK-NEXT: output byte baz
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; CHECK-NEXT: );
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; CHECK: `define __CIRCT_DPI_IMPORT_CLOCKED_RESULT
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; CHECK-NEXT: `endif
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; CHECK-LABEL: `ifndef __CIRCT_DPI_IMPORT_CLOCKED_VOID
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; CHECK-NEXT: import "DPI-C" context function void clocked_void(
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; CHECK-NEXT: input byte in_0,
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; CHECK-NEXT: in_1,
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; CHECK-NEXT: in_2[]
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; CHECK-NEXT: );
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; CHECK: `define __CIRCT_DPI_IMPORT_CLOCKED_VOID
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; CHECK-NEXT: `endif
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; CHECK-LABEL: `ifndef __CIRCT_DPI_IMPORT_UNCLOCKED_RESULT
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; CHECK-NEXT: import "DPI-C" context function void unclocked_result(
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; CHECK-NEXT: input byte in_0,
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; CHECK-NEXT: in_1,
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; CHECK-NEXT: output byte out_0
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; CHECK-NEXT: );
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; CHECK: `define __CIRCT_DPI_IMPORT_UNCLOCKED_RESULT
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; CHECK-NEXT: `endif
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; CHECK-LABEL: module DPI(
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; CHECK: logic [7:0] [[TMP:_.+]];
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; CHECK-NEXT: reg [7:0] [[RESULT1:_.+]];
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; CHECK-NEXT: wire [7:0] [[OPEN_ARRAY:_.+]][0:1];
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; CHECK-NEXT: assign [[OPEN_ARRAY]] = '{in_0, in_1};
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; CHECK-NEXT: always @(posedge clock) begin
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; CHECK-NEXT: if (enable) begin
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; CHECK-NEXT: clocked_result(in_0, in_1, [[TMP]]);
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; CHECK-NEXT: [[RESULT1]] <= [[TMP]];
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; CHECK-NEXT: clocked_void(in_0, in_1, [[OPEN_ARRAY]]);
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; CHECK-NEXT: end
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; CHECK-NEXT: end // always @(posedge)
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; CHECK-NEXT: reg [7:0] [[RESULT2:_.+]];
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; CHECK-NEXT: always_comb begin
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; CHECK-NEXT: if (enable) begin
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; CHECK-NEXT: unclocked_result(in_0, in_1, [[RESULT2]]);
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; CHECK-NEXT: end
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; CHECK-NEXT: else
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; CHECK-NEXT: [[RESULT2]] = 8'bx;
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; CHECK-NEXT: end // always_comb
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; CHECK-NEXT: assign out_0 = [[RESULT1]];
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; CHECK-NEXT: assign out_1 = [[RESULT2]];
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; CHECK-NEXT: endmodule
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public module DPI :
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input clock: Clock
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input enable: UInt<1>
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input in: UInt<8>[2]
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output out : UInt<8>[2]
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node result1 = intrinsic(circt_dpi_call<isClocked = 1, functionName="clocked_result", inputNames="foo;bar", outputName="baz"> : UInt<8>, clock, enable, in[0], in[1])
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intrinsic(circt_dpi_call<isClocked = 1, functionName="clocked_void">, clock, enable, in[0], in[1], in)
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node result2 = intrinsic(circt_dpi_call<isClocked = 0, functionName="unclocked_result"> : UInt<8>, enable, in[0], in[1])
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connect out[0], result1
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connect out[1], result2
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