mirror of https://github.com/llvm/circt.git
42 lines
1.0 KiB
Plaintext
42 lines
1.0 KiB
Plaintext
; RUN: firtool --btor2 %s | FileCheck %s
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FIRRTL version 4.0.0
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circuit Counter :
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public module Counter :
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input clock : Clock
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input reset : UInt<1>
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input en : UInt<1>
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regreset count : UInt<32>, clock, reset, UInt<32>(0h0)
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when and(eq(count, UInt<32>(22)), en) :
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connect count, UInt<1>(0h0)
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when and(neq(count, UInt<32>(22)), en) :
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connect count, tail(add(count, UInt<1>(0h1)), 1)
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assert(clock, neq(count, UInt<4>(0ha)), en, "Counter reached 10!")
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; CHECK: 1 sort bitvec 1
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; CHECK: 2 input 1 reset
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; CHECK: 3 input 1 en
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; CHECK: 4 sort bitvec 32
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; CHECK: 5 state 4 count
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; CHECK: 6 constd 4 1
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; CHECK: 7 constd 4 10
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; CHECK: 8 constd 4 22
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; CHECK: 9 constd 4 0
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; CHECK: 10 eq 1 5 8
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; CHECK: 11 and 1 10 3
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; CHECK: 12 ite 4 11 9 5
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; CHECK: 13 neq 1 5 8
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; CHECK: 14 and 1 13 3
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; CHECK: 15 add 4 5 6
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; CHECK: 16 ite 4 14 15 12
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; CHECK: 17 neq 1 5 7
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; CHECK: 18 implies 1 3 17
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; CHECK: 19 not 1 18
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; CHECK: 20 bad 19
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; CHECK: 21 ite 4 2 9 16
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; CHECK: 22 next 4 5 21
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