circt/docs
Hideto Ueno 0f28017243
[AIG] Add LongestPath Analysis boilerplates, data structure and rational doc (#8505)
This commit adds boilerplates, data structure and rational doc for LongestPath analysis in AIG.
See rational doc for the details.
2025-05-22 17:24:26 -07:00
..
CommandGuide add heading for handshake-runner 2021-01-12 21:59:28 +05:30
Dialects [AIG] Add LongestPath Analysis boilerplates, data structure and rational doc (#8505) 2025-05-22 17:24:26 -07:00
PyCDE [ESI] Remove last references to capnp (#7315) 2024-07-12 06:36:10 -07:00
includes [LLHD] Remove llhd-sim (#7351) 2024-07-19 17:54:14 +01:00
CMakeLists.txt [DOC] Add Doxygen documentation support (#362) 2020-12-27 09:44:58 +05:30
Charter.md [Docs] Fix hw, comb and sv dialect links (#3638) 2022-08-02 11:06:57 +02:00
FormalVerification.md [docs] Add circt-bmc usage information to FormalVerification.md (#8165) 2025-01-31 19:26:31 +00:00
GettingStarted.md [docs] Fix broken image links in docs (#7710) 2024-10-18 13:29:59 -06:00
HLS.md Update HLS.md 2023-11-03 10:08:43 +01:00
Passes.md [DOC] Add missing passes (#8344) 2025-03-25 00:56:45 -04:00
PythonBindings.md [Docs] Update Python bindings pip instructions (#7147) 2024-06-09 10:29:28 -06:00
RationaleSymbols.md [docs] Add text describing the inner symbol classes/traits/verif. (#3743) 2022-08-19 10:38:55 -05:00
Scheduling.md [Scheduling] Define problem to model operator chaining in cyclic problem. (#6485) 2023-12-12 09:43:26 +01:00
ToolsWorkarounds.md [NFC][Docs] Tiny tool workarounds typo fix 2024-12-04 10:08:39 +00:00
VerilogGeneration.md [ExportVerilog] Add a lowering option to fix up empty modules (#7454) 2024-08-08 15:39:05 +09:00
dialects.dot [LLHD] Remove llhd-sim (#7351) 2024-07-19 17:54:14 +01:00
dialects.drawio [StaticLogic] Rename dialect to 'Pipeline' (#3648) 2022-08-04 10:58:40 +02:00
doxygen-mainpage.dox [DOC] Add Doxygen documentation support (#362) 2020-12-27 09:44:58 +05:30
doxygen.cfg.in [DOC] Add Doxygen documentation support (#362) 2020-12-27 09:44:58 +05:30