dcc13ca49b
Implement vector types. The type system is done!
2020-03-27 21:05:00 -07:00
ef1811db70
Implement support for Bundle types.
2020-03-27 13:34:24 -07:00
e97285aa6a
Implement support for flip types, mapping output ports onto it. Stub out
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some parts of bundle and vector, but they are not implemented yet.
2020-03-26 17:43:16 -07:00
6a87c32d1d
rearrange the type system a bit, introduce a new common FIRRTLType class.
2020-03-26 11:25:16 -07:00
d5af2ba90c
Pull SInt/UInt width handling into the same architecture as Analog.
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This stops using the MLIR builtin type for ui/si types because it
makes them special and different - consistency seems more important
here within the firrtl dialect.
2020-03-24 12:33:52 -07:00
6033f284f2
correctly parse the width in an int/analog spec.
2020-03-24 09:39:34 -07:00
e30671ef0e
Add support for widths on analog types.
2020-03-23 23:11:59 -07:00
48c4da1abf
Start implementing the FIRRTL type system, "Ground types" first.
2020-03-23 11:57:27 -07:00
dff5dd1691
Add ports to the MLIR representation. This plumbs through result
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returning into the portList parser and the type parser.
2020-03-22 20:50:26 -07:00
b11257833d
create MLIR representation of circuit and module ops. This ignores
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ports, location info, etc.
2020-03-22 12:31:23 -07:00
7668f6d04c
Move the module parsing logic into a new FIRModuleParser class, NFC.
2020-03-22 11:43:44 -07:00
4b36d536dd
Implement parser support for extmodule and info records.
2020-03-22 11:35:46 -07:00
4de1dbda33
Implement clases for the .fir parser mechanics, implementing just
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enough parser logic for circuit and modules to get through the
testcases.
In addition to the parser logic, this improves the lexer to be able
to report indentation, adds the <= token, and fixes some problems with
split-input-files in the errors.fir testcase.
2020-03-21 23:09:53 -07:00
2f64d97d6e
Finish up the lexer, at least far enough to be able to lex a very large
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firtl files, and add some testcases for errors.
2020-03-20 13:06:00 -07:00
d8726bd431
Implement a big chunk of a lexer for .fir files, including punctuation
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comments, keywords, etc. The grammar for literals is wrong and largely
missing, but this gets a useful chunk of .fir files through the lexer.
This includes a silly test driver that shows things are getting properly
tokenized.
2020-03-17 17:46:05 -07:00
588212f71d
add a VS Code configuration.
2020-03-16 15:16:13 -07:00
2fe028d811
Implement the build and integeration outline of an spt-translate tool,
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and stub out a .fir parser (which doesn't do anything yet) that is driven
from it.
2020-03-16 15:14:56 -07:00
dfac4c84db
Have the module printing logic consider whether the generated name is
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correct. If not, generate a firrtl.name attribute explicitly to ensure
we round-trip correctly.
This depends on this unlanded MLIR patch: https://reviews.llvm.org/D76205
2020-03-15 18:52:26 -07:00
233e04e710
Improve the README to include some contributor notes, clang-format
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the codebase.
2020-03-15 17:59:29 -07:00
c056bf088e
Updates to work with MLIR ToT.
2020-03-12 22:57:37 -07:00
613ac5eb6c
Do not print the firrtl.name attribute on parameters if we've managed
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to merge it into the argument list.
2020-03-09 09:20:34 -07:00
a906b944bf
Implement the OpAsmDialectInterface interface for FIRRTL, enabling us to
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use the attribute names as the SSA names for things in dumps.
2020-03-08 18:28:46 -07:00
f7c63a5253
Convert module to being an an op that is FunctionLike, IsolatedFromAbove, Symbol.
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This adds the ability to model inputs and outputs. The parsing side is nice,
but the printing side still needs to use the symbolic argument names.
2020-03-08 12:44:23 -07:00
395b7bee7a
Add a firrtl.connect op definition.
2020-03-07 23:14:19 -08:00
ef84a84a6f
Introduce a firrtl.invalid operation and give firrtl.add nicer syntax.
2020-03-07 23:10:55 -08:00
6dfa2793f0
Give circuit and module custom syntax, making them much nicer to read and write.
2020-03-07 19:51:52 -08:00
288b0c10c7
Introduce op definitions for module, circuit and a 'done' terminator. Add
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testcases to show things it catches.
2020-03-07 19:27:37 -08:00
24c3b33447
Create the sketch of a FIRRTL dialect, with a single type (firrtl.uint) and a
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single registered operations (firrtl.add). Add a testcase showing that these
are now being properly checked.
2020-03-07 15:47:08 -08:00
71b7e2cb93
Add a sketch of a direct translation of a couple of examples of firrtl-in-mlir.
2020-03-06 17:27:04 -08:00
7783a53c8e
Push the cmake files far enough along to make spt-opt be able to link in
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MLIR libraries, parsing and printing the output, running passes, etc.
2020-03-06 16:42:00 -08:00
64cec97240
Introduce a CMakefile scaffolding to build and test an executable.
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This also updates the README to include some building information.
Lots of caveats:
- This is all experimental
- The actual tool isn't interesting yet.
- The naming is arbitrary and will likely change.
- Much of the cmake files were cargo culted from other places
because I don't know what I'm doing.
2020-03-05 15:16:55 -08:00
2d02904135
Initial commit
2020-03-04 20:57:43 -08:00
Chris Lattner