Towards https://github.com/llvm/circt/issues/3430, this PR implements
generic SV attributes which are allowed to be attached to arbitrary expression.
1. Disable some SV canonicalizers to keep sv attributes. Canonicalizations
of comb and hw are not blocked in this PR (maybe necessary in the future).
2. HWCleanup cannot merge operations if there is a SV attribute.
3. Currently ExportVerilog emission is implemented for only
reg, wire, assignments and hw.array_get to reduce the complexity of
this PR. When SV attributes are attached to unsupported ops,
ExportVerilog emits errors.
4. Python bindings are also modified
The change moves the dialect specific documentation, such as the many
rationale documents, into the dialect tree. A folder had to be created
for each affected dialect, with an index page containing the orginal
generated contents of the page.
To facilitate this change, I had to update the CIRCT website with some
enhancements made to the MLIR website. I tested this by running the
webpage locally.