Commit Graph

5023 Commits

Author SHA1 Message Date
Hideto Ueno d81f0623d5
[HW] Add a folder for array slice op (#4052)
This PR adds a folder for array slice op to fold slice op which extracts entire inputs.
2022-10-04 20:09:17 +09:00
Morten Borup Petersen a63a23cb7b
[HandshakeToHW] Fix merge, control merge, buffer (#4053)
+ a small modification to `_findPort` in the handshake test driver to comply with ESI port naming.
2022-10-04 12:54:02 +02:00
Morten Borup Petersen 8ae35705be [hlstool] Add iverilog tracing option 2022-10-04 11:14:42 +02:00
Morten Borup Petersen ec80537cfe [SV] Make `-sv-trace-iverilog` trace top module by default 2022-10-04 11:14:42 +02:00
Mike Urbach d4aade214b
Bump LLVM to c4ca3a2c4b00033c393f694c1d92d28ff55c69cd. (#4048)
This included three renames:
* Arithmetic -> Arith
* FunctionOpInterface::getBody -> FunctionOpInterface::getBodyBlock
* MemRef dialect switching to prefixed accessors (memref -> getMemref, etc.)
2022-10-03 20:36:21 -06:00
Will Dietz 42a7e058c2
[NFC] Comment fixups, mostly re:duplicate words (#4050) 2022-10-03 18:53:08 -05:00
Will Dietz a1e0e22aff
[ExportVerilog][NFC] Drop another unused tracking cursor. (#4049)
Now only cursor is for retroactively adding 'begin' when emitting
blocks of statements.
2022-10-03 17:35:21 -05:00
Will Dietz 73e75461ec
[ExportVerilog][NFC] Remove blockDeclaration* tracking as unused. (#4046)
* blockDeclarationInsertPoint is only written, never used
* blockDeclarationIndentLevel is used but is same as normal indent
  (likely because we aren't inserting to different point anymore)
2022-10-03 16:55:42 -05:00
Christian Ulmann 41c9ab471f
[Handshake] Drop ctrl requirement from InstanceOp (#4047) 2022-10-03 22:45:46 +02:00
Morten Borup Petersen 30bcfec8a6
[HandshakeToHW] Fix fork lowering, better naming (#4045) 2022-10-03 14:51:44 +02:00
Morten Borup Petersen a490ee6bb0 [HandshakeToHW] Fix integration test 2022-10-03 11:52:40 +02:00
Morten Borup Petersen a58e5528ec [HandshakeToHW] Add missing buffer init name info 2022-10-03 11:26:49 +02:00
Morten Borup Petersen c63d2a0ea6 [Handshake] Exclude any *.py file in integration tests 2022-10-03 09:49:22 +02:00
Morten Borup Petersen 74ce53c293 [hlstool] Fix nesting of extmem lowering pass 2022-10-03 09:40:39 +02:00
Morten Borup Petersen 5d51257539 [HandshakeToHW] extmemory now lowered in separate pass 2022-10-03 08:38:26 +02:00
Schuyler Eldridge 8d75cb1a7e
[FIRRTL] Unknown Annotation Error, not Warn
Change the diagnostic when LowerAnnotations hits an unknown annotation
from warning to error.  LowerAnnotations will immediately exit after
this message and it is more appropriate to use an error than a warning.

Add a test of this behavior.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
2022-09-30 21:10:49 -04:00
Will Dietz ec6a27a183
[Handshake][NFC] Touchups to address error/warnings. (#4039)
* [Handshake][NFC] fix error re:not returning value

In non-assert builds this code must return something.
Windows CI is producing error because of this.

* [Handshake][NFC] Small tweaks to quiet warnings about shifts.
2022-09-30 13:19:45 -05:00
Will Dietz c61e42766d
Revert "[NFC] Make prepareforemission an embedded pass...", breaks -verbose-pass-executions (#4034)
Add simple test to check -verbose-pass-executions.

See PR for some details re:why it breaks (LoweringOptions as PassOption).
2022-09-30 10:26:04 -05:00
Will Dietz d82ecaa932
[CI] Fix llvm-lit path for Windows build. (#4032) 2022-09-30 08:58:18 -05:00
Hideto Ueno f1bda70bb0
[PrettifyVerilog] Fix a crash caused by comparing different width of APInt (#4031)
This fixes https://github.com/llvm/circt/issues/4030. The crash was caused by comparing different width of APInt so this PR fixes the issue by checking types before comparing APInt.
2022-09-30 21:02:35 +09:00
Hideto Ueno 275e4d75dd
[PrepareForEmission] Improve namehints heuristic and add mux heuristic (#4019)
This PR improves namehints heuristic and add a heuristic to spill wires for mux. Namehint heuristic is modified to spill wires for namehints that doesn't have "\_" prefix regardless of term sizes. For expressions with "\_" prefix, if the term is greater than a threshold, the expression is spilled to a wire. Also this PR adds a heuristic option to spill all mux.

Co-authored-by: Will Dietz <will.dietz@sifive.com>
2022-09-30 19:57:29 +09:00
Morten Borup Petersen f97396f9bb [hlstool] Run canonicalizer after HandshakeToHW 2022-09-30 12:41:36 +02:00
Morten Borup Petersen cd3d1a2285
[Handshake] Add `handshake.extmem` lowering pass (#4020)
This is intended to be a lowering used for transforming Handshake to hardware.
The transformation materializes the top-level `memref` to a new set of in- and output arguments, and plumbs to the in- and output values of the `handshake.extmem` operation which referenced the memref. This is essentially what is was done by `HandshakeToFIRRTL`/`HandshakeToHW` but can be moved as a preprocessing step.

Another motivation for doing so is to create a more natural interface for external users to interact with:
- Store ports now have a single handshake'd output port with combined addr+data.
- Load ports now only requires a single handshake'd data input. This input is then forked into its data+control parts to feed the load- and store operations.

In doing so, we also use `!hw.struct` types to ensure that correct names are being maintained for the in- and output values. This is opposed to using tuples, which does not have named fields.
The tuple requires use of `hw.struct_create` - in HandshakeToHW, this can be supported identically to `handshake.pack` which itself uses `hw.struct_create` after tuple types have been lowered to structs.
2022-09-30 12:24:04 +02:00
Morten Borup Petersen c87e46275d
[ExportVerilog] Handle `hw.struct_explode` (#4012)
Currently, ExportVerilog will crash on trying to emit a  `hw.struct_explode` operation. Fixed by lowering the op to a set of `hw.struct_extract` ops during prepareForEmission, which has clear emission semantics.
2022-09-30 12:22:27 +02:00
Morten Borup Petersen d2d7f8c8b6
[SV] Add iverilog trace instrumentation pass (#4013)
Adds a macro to a HWModule(s) which enables tracing for iverilog (see https://docs.cocotb.org/en/stable/simulator_support.html#waveforms).
2022-09-30 12:00:54 +02:00
Morten Borup Petersen 13649ec8b3
[HW] Improve asm result names for struct extract, explode ops (#3998) 2022-09-30 12:00:35 +02:00
Morten Borup Petersen 9996a6cbce
[ExportVerilog] Improve error message for emitting unsupported ops (#4011)
Been annoyed by this assert being thrown for a long time. If unsupported operations is fed to the ExportVerilog pass (may happen if some other lowering pass wasn't run or export verilog is missing an implementation for lowering some op), a very unhelpful assert would be thrown stating `value expected a name but doesn't have one` - telling us nothing about which op actually violated the condition.

Modifies this to actually printing the op + an error message indicating the most likely cause for tripping this assert.
2022-09-30 12:00:13 +02:00
Morten Borup Petersen ed3d7d7669 [HandshakeToHW] Fix buffering tuple values 2022-09-30 11:57:00 +02:00
Nandor Licker b736007cfb [InferWidths] clang-format fix 2022-09-30 11:26:02 +03:00
Morten Borup Petersen 1b029f0ae2 [NFC] Fix a couple of warnings 2022-09-30 10:24:05 +02:00
Nandor Licker 45129edd76 [InferWidths] Introduce explicit types to avoid templating problems 2022-09-30 11:20:18 +03:00
Mike Urbach 913284dc91 [Python] Add FlatSymbolRefAttr to attribute_to_var.
This is basically the same as StringAttr, and is useful for a utility
that's going to use this.
2022-09-29 20:59:22 -06:00
Fabian Schuiki e4e0cea14c
[FIRRTL][InferResets] Don't abort on foreign types (#4025)
Make the `InferResets` pass properly ignore foreign types which by
definition don't contribute to the resets being inferred. Before this
change the pass would abort on various `cast<FIRRTLType>()` calls. These
all become `dyn_cast<FIRRTLType>()` now with graceful handling of the
non-FIRRTL type case, which makes the pass more robust.
2022-09-29 17:15:28 -07:00
Fabian Schuiki a26d1b6d1f
[FIRRTL][LowerTypes] Pass through foreign types in lowerProducer (#4027)
Adjust the `lowerProducer` function such that it properly passes through
foreign types like it passes through any non-bundle type.
2022-09-29 15:25:13 -07:00
Fabian Schuiki 5036a32d44
[FIRRTL][InferWidths] Exclude foreign types, add conversion cast support (#4026)
The `InferWidths` pass should ignore any foreign types that might be
present in the IR. These types cannot contribute any width constraints
and don't participate in the width inference process in general, so this
commit makes the pass ignore such types more explicitly.

Also add support for `UnrealizedConversionCastOp`. In case such a cast
has a result of uninferred width, the pass would now assign a width to
it as with any other operation. The applicability of this in practice is
fairly limited since width inference can only affect the FIRRTL-typed
results of the cast, but it can't propagate any information through the
cast. However, in some applications a partial dialect lowering might be
sensitive to the source type of the cast and do the right thing based on
what width was assigned, making this a niche but useful change.
2022-09-29 15:24:30 -07:00
Andrew Lenharth ef8d6657be [NFC] Spelling 2022-09-29 16:53:03 -05:00
Mike Urbach 16f18f40b0
[SV] Update ExtractTestCode to extract input only modules. (#4014)
If a module has only inputs after extraction, it can and should be
moved to the test code area. Such modules are marked to be output into
the test code path.

Closes https://github.com/llvm/circt/issues/2351.
2022-09-29 14:14:39 -06:00
Will Dietz 7a1760cf8e
[ExportVerilog] emit comments on `else and `endif for readability (#4024) 2022-09-29 14:54:02 -05:00
Fabian Schuiki eba1bb5b81
[FIRRTL] Allow foreign types in module/instance ports (#2694)
In order to support partial lowerings involving the FIRRTL dialect, and
to mix in foreign operations and types, we need a way to pass foreign
types through FIRRTL modules, instances, and trivial connects.

This commit extends `FModuleLike`, `InstanceOp`, `StrictConnectOp`, and
`WireOp` to also accept foreign, non-FIRRTL types for ports and
connections to those ports. It also adapts the `LowerToHW` pass to
simply pass through foreign-typed values when they appear in module and
instance ports. This requires adding special case handling in a few
places since we cannot create an `InOutType` and therefore `sv::WireOp`
around arbitrary foreign types, so we generally have to immediately
materialize foreign values.

This lowering can be quite usefully combined with the builtin
`unrealized_conversion_cast` to wrap and unwrap values of foreign types
and establish a path for FIRRTL values to cross dialect boundaries in a
controlled fashion.

In more details, this PR does the following:

- Allow foreign types in:
  - `FModuleLike`
  - `InstanceOp`
  - `StrictConnectOp`
  - `WireOp`
- During lowering to HW, force module and instance port connections to
  materialize connected values directly if they are of foreign type,
  since we cannot create temporary wires to hold these values.
2022-09-29 10:25:48 -07:00
Prithayan Barua 2fb9fa5fc3
[FIRRTL][GrandCentral] Revert mem tap sink attribute to array (#4022)
This commit reverts the changes to MemTap annotation introduced in #4006.
MemTap sink should be an array attribute instead of a string attribute.
Annotation should be `"sink": "~Top|Top>memTap"` instead of 
`"sink":["~Top|Top>memTap[0]", "~Top|Top>memTap[1]", ...] `
2022-09-29 10:09:17 -07:00
Nandor Licker 9ef4ead820
[HW] Added methods to operate on in and inout ports (#4023)
Co-authored-by: Fabian Schuiki <fabian@schuiki.ch>
2022-09-29 19:49:02 +03:00
Andrew Lenharth be732e05fe
[NFC] Make prepareforemission an embedded pass run by the pass manager (#4015) 2022-09-29 11:42:46 -05:00
Nandor Licker a5035daed8 [HWOps] Fixed port insertion order in 2022-09-29 19:31:21 +03:00
Schuyler Eldridge 921e11f777
[FIRRTL] Fix GCT Instance Name Prefix (#4016)
Stop mangling the name of Grand Central (GCT) Views in the companion and
parent annotations during the PrefixModules pass.  This fixes a bug
where the prefix was incorrectly applied to the instance name of an
interface.

Extend an existing end-to-end GCT View test case to also check that
NestedModulePrefixAnnotation and PrefixInterfacesAnnotation apply and
compose correctly.  Specifically, the prefix annotation is applied to
all module names, but the prefix interfaces annotation is only applied
to the interfaces.  The instance name should match the name of the view
and not be prefixed.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
2022-09-29 11:21:24 -04:00
Nandor Licker efc573d2d8 [HWOps] Fixed deletion of block arguments
`modifyModuleArgs` did not work when deleting multiple arguments as indices shifted with deletion.
2022-09-29 16:02:34 +03:00
Morten Borup Petersen 2cf788cc4f
[HW] Add PruneZeroValuedLogic to PrepareForEmission (#3935)
An attempt at #2219 (#2909 related), and motivated by `HandshakeToHW` wanting to delegate pruning of all data-less logic to after the lowering phase, instead of having to sprinkle special-case logic all over the lowering pass itself.

This is not the support that is imediately needed for #2219, which concerns itself mostly with values that index into memories (singleton memories cannot be indexed => indexing wire is `i0`) but I'd expect something like this to inevitably be needed in the long run regardless.

Instead, this commit concerns itself with combinational and sequential logic which uses `i0`-typed values.
This commit takes an aggressive approach and prunes all arithmetic (and `seq.compreg`) operations which uses `i0` values under the assumption that any arithmetic taking part in an `i0` chain will not materialize to anything in hardware.
2022-09-29 10:25:46 +02:00
Christian Ulmann 8c05af9467
[Handshake][lit] Ensure line rate transfere (#4017) 2022-09-29 10:16:10 +02:00
Morten Borup Petersen 727209a748
[HW] Add `hw.struct_explode` canonicalizer (#4010)
Leverages the same logic used for folding `hw.struct_extract`, fixes #4008.
2022-09-29 10:10:22 +02:00
Prithayan Barua c3fd759d84
[FIRRTL][GrandCentral] Update DataTaps and MemTaps annotation attribute (#4006)
Update the GrandCentralTaps attribute from `wireName` to `sink`, and
MemTaps array attribute of `wireName`  to just a string attribute of `sink`.
2022-09-28 10:08:17 -07:00
Julian Oppermann 9fd51f91da [Scheduling] Silence warning, NFC. 2022-09-28 18:10:19 +02:00