mirror of https://github.com/llvm/circt.git
[LowerXMR] Emit hierpathop's as private, so they can be removed if unused. (#4461)
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045c2f283d
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@ -574,6 +574,7 @@ class LowerXMRPass : public LowerXMRBase<LowerXMRPass> {
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builder.create<hw::HierPathOp>(
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builder.create<hw::HierPathOp>(
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circuitNamespace->newName("xmrPath"), pathArray)})
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circuitNamespace->newName("xmrPath"), pathArray)})
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.first->second;
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.first->second;
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path.setVisibility(SymbolTable::Visibility::Private);
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// Save the insertion point so other unique HierPathOps will be created
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// Save the insertion point so other unique HierPathOps will be created
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// after this one.
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// after this one.
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@ -23,7 +23,7 @@ firrtl.circuit "xmr" {
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// Test the correct xmr path is generated
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// Test the correct xmr path is generated
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]]
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// CHECK-SAME: [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK-SAME: [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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// CHECK: firrtl.module @XmrSrcMod() {
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// CHECK: firrtl.module @XmrSrcMod() {
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@ -75,7 +75,7 @@ firrtl.circuit "Top" {
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// Test the correct xmr path to port is generated
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// Test the correct xmr path to port is generated
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(in %pa: !firrtl.uint<1>, out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(in %pa: !firrtl.uint<1>, out %_a: !firrtl.ref<uint<1>>) {
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// CHECK: firrtl.module @XmrSrcMod(in %pa: !firrtl.uint<1> sym @[[xmrSym]]) {
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// CHECK: firrtl.module @XmrSrcMod(in %pa: !firrtl.uint<1> sym @[[xmrSym]]) {
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%1 = firrtl.ref.send %pa : !firrtl.uint<1>
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%1 = firrtl.ref.send %pa : !firrtl.uint<1>
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@ -103,11 +103,11 @@ firrtl.circuit "Top" {
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// Test for multiple readers and multiple instances
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// Test for multiple readers and multiple instances
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK-DAG: hw.hierpath @[[path_0:[a-zA-Z0-9_]+]] [@Foo::@fooXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK-DAG: hw.hierpath private @[[path_0:[a-zA-Z0-9_]+]] [@Foo::@fooXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK-DAG: hw.hierpath @[[path_1:[a-zA-Z0-9_]+]] [@Bar::@barXMR, @XmrSrcMod::@[[xmrSym]]]
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// CHECK-DAG: hw.hierpath private @[[path_1:[a-zA-Z0-9_]+]] [@Bar::@barXMR, @XmrSrcMod::@[[xmrSym]]]
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// CHECK-DAG: hw.hierpath @[[path_2:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym]]]
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// CHECK-DAG: hw.hierpath private @[[path_2:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym]]]
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// CHECK-DAG: hw.hierpath @[[path_3:[a-zA-Z0-9_]+]] [@Top::@foo, @Foo::@fooXMR, @XmrSrcMod::@[[xmrSym]]]
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// CHECK-DAG: hw.hierpath private @[[path_3:[a-zA-Z0-9_]+]] [@Top::@foo, @Foo::@fooXMR, @XmrSrcMod::@[[xmrSym]]]
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// CHECK-DAG: hw.hierpath @[[path_4:[a-zA-Z0-9_]+]] [@Top::@xmr, @XmrSrcMod::@[[xmrSym]]]
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// CHECK-DAG: hw.hierpath private @[[path_4:[a-zA-Z0-9_]+]] [@Top::@xmr, @XmrSrcMod::@[[xmrSym]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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// CHECK: firrtl.module @XmrSrcMod() {
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// CHECK: firrtl.module @XmrSrcMod() {
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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@ -171,7 +171,7 @@ firrtl.circuit "Top" {
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// Check for downward reference
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// Check for downward reference
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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// CHECK: firrtl.module @XmrSrcMod() {
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// CHECK: firrtl.module @XmrSrcMod() {
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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@ -210,7 +210,7 @@ firrtl.circuit "Top" {
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// Check for downward reference to port
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// Check for downward reference to port
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(in %pa: !firrtl.uint<1>, out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(in %pa: !firrtl.uint<1>, out %_a: !firrtl.ref<uint<1>>) {
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// CHECK: firrtl.module @XmrSrcMod(in %pa: !firrtl.uint<1> sym @xmr_sym) {
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// CHECK: firrtl.module @XmrSrcMod(in %pa: !firrtl.uint<1> sym @xmr_sym) {
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%1 = firrtl.ref.send %pa : !firrtl.uint<1>
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%1 = firrtl.ref.send %pa : !firrtl.uint<1>
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@ -245,8 +245,8 @@ firrtl.circuit "Top" {
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// Test for multiple paths and downward reference.
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// Test for multiple paths and downward reference.
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path_0:[a-zA-Z0-9_]+]] [@Top::@foo, @Foo::@fooXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path_0:[a-zA-Z0-9_]+]] [@Top::@foo, @Foo::@fooXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath @[[path_1:[a-zA-Z0-9_]+]] [@Top::@xmr, @XmrSrcMod::@[[xmrSym]]]
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// CHECK: hw.hierpath private @[[path_1:[a-zA-Z0-9_]+]] [@Top::@xmr, @XmrSrcMod::@[[xmrSym]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%1 = firrtl.ref.send %zero : !firrtl.uint<1>
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%1 = firrtl.ref.send %zero : !firrtl.uint<1>
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@ -280,7 +280,7 @@ firrtl.circuit "Top" {
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// Test for multiple children paths
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// Test for multiple children paths
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@xmr, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@xmr, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%1 = firrtl.ref.send %zero : !firrtl.uint<1>
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%1 = firrtl.ref.send %zero : !firrtl.uint<1>
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@ -326,7 +326,7 @@ firrtl.circuit "Top" {
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// Test for multiple children paths
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// Test for multiple children paths
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@xmr, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@xmr, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%1 = firrtl.ref.send %zero : !firrtl.uint<1>
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%1 = firrtl.ref.send %zero : !firrtl.uint<1>
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@ -371,7 +371,7 @@ firrtl.circuit "Top" {
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// Multiply instantiated Top works, because the reference port does not flow through it.
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// Multiply instantiated Top works, because the reference port does not flow through it.
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Dut::@xmr, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Dut::@xmr, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%zero = firrtl.constant 0 : !firrtl.uint<1>
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%1 = firrtl.ref.send %zero : !firrtl.uint<1>
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%1 = firrtl.ref.send %zero : !firrtl.uint<1>
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@ -421,7 +421,7 @@ firrtl.circuit "Top" {
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// -----
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// -----
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@xmr_sym, @DUTModule::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@xmr_sym, @DUTModule::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK-LABEL: firrtl.module private @DUTModule
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// CHECK-LABEL: firrtl.module private @DUTModule
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// CHECK-SAME: (in %clock: !firrtl.clock, in %io_addr: !firrtl.uint<3>, in %io_dataIn: !firrtl.uint<8>, in %io_wen: !firrtl.uint<1>, out %io_dataOut: !firrtl.uint<8>)
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// CHECK-SAME: (in %clock: !firrtl.clock, in %io_addr: !firrtl.uint<3>, in %io_dataIn: !firrtl.uint<8>, in %io_wen: !firrtl.uint<1>, out %io_dataOut: !firrtl.uint<8>)
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firrtl.module private @DUTModule(in %clock: !firrtl.clock, in %io_addr: !firrtl.uint<3>, in %io_dataIn: !firrtl.uint<8>, in %io_wen: !firrtl.uint<1>, out %io_dataOut: !firrtl.uint<8>, out %_gen_memTap: !firrtl.ref<vector<uint<8>, 8>>) attributes {annotations = [{class = "sifive.enterprise.firrtl.MarkDUTAnnotation"}]} {
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firrtl.module private @DUTModule(in %clock: !firrtl.clock, in %io_addr: !firrtl.uint<3>, in %io_dataIn: !firrtl.uint<8>, in %io_wen: !firrtl.uint<1>, out %io_dataOut: !firrtl.uint<8>, out %_gen_memTap: !firrtl.ref<vector<uint<8>, 8>>) attributes {annotations = [{class = "sifive.enterprise.firrtl.MarkDUTAnnotation"}]} {
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@ -505,7 +505,7 @@ firrtl.circuit "Top" {
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// -----
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// -----
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@xmr_sym, @DUTModule::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@xmr_sym, @DUTModule::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK-LABEL: firrtl.module private @DUTModule
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// CHECK-LABEL: firrtl.module private @DUTModule
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// CHECK-SAME: in %io_wen: !firrtl.uint<1>, out %io_dataOut: !firrtl.uint<8>)
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// CHECK-SAME: in %io_wen: !firrtl.uint<1>, out %io_dataOut: !firrtl.uint<8>)
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firrtl.module private @DUTModule(in %clock: !firrtl.clock, in %io_addr: !firrtl.uint<3>, in %io_dataIn: !firrtl.uint<8>, in %io_wen: !firrtl.uint<1>, out %io_dataOut: !firrtl.uint<8>, out %_gen_memTap_0: !firrtl.ref<uint<8>>, out %_gen_memTap_1: !firrtl.ref<uint<8>>) attributes {annotations = [{class = "sifive.enterprise.firrtl.MarkDUTAnnotation"}]} {
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firrtl.module private @DUTModule(in %clock: !firrtl.clock, in %io_addr: !firrtl.uint<3>, in %io_dataIn: !firrtl.uint<8>, in %io_wen: !firrtl.uint<1>, out %io_dataOut: !firrtl.uint<8>, out %_gen_memTap_0: !firrtl.ref<uint<8>>, out %_gen_memTap_1: !firrtl.ref<uint<8>>) attributes {annotations = [{class = "sifive.enterprise.firrtl.MarkDUTAnnotation"}]} {
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@ -540,7 +540,7 @@ firrtl.circuit "Top" {
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// Test lowering of internal path into a module
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// Test lowering of internal path into a module
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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// CHECK: firrtl.module @XmrSrcMod() {
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// CHECK: firrtl.module @XmrSrcMod() {
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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@ -570,7 +570,7 @@ firrtl.circuit "Top" {
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// Test lowering of internal path into a module
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// Test lowering of internal path into a module
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// CHECK-LABEL: firrtl.circuit "Top" {
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// CHECK-LABEL: firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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firrtl.circuit "Top" {
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// CHECK: hw.hierpath @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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// CHECK: hw.hierpath private @[[path:[a-zA-Z0-9_]+]] [@Top::@bar, @Bar::@barXMR, @XmrSrcMod::@[[xmrSym:[a-zA-Z0-9_]+]]]
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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firrtl.module @XmrSrcMod(out %_a: !firrtl.ref<uint<1>>) {
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// CHECK: firrtl.module @XmrSrcMod() {
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// CHECK: firrtl.module @XmrSrcMod() {
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// CHECK{LITERAL}: firrtl.verbatim.expr "internal.path" : () -> !firrtl.uint<1> {symbols = [@XmrSrcMod]}
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// CHECK{LITERAL}: firrtl.verbatim.expr "internal.path" : () -> !firrtl.uint<1> {symbols = [@XmrSrcMod]}
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