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Allow firrtl hardware ops under sv.ifdef (#7309)

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Robert Young 2024-07-11 20:54:25 -04:00 committed by GitHub
parent 961bad58f4
commit cdfcd96664
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5 changed files with 7 additions and 4 deletions
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2
include/circt/Dialect/FIRRTL/FIRRTLDeclarations.td
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@ -38,7 +38,7 @@ class HardwareDeclOp<string mnemonic, list <Trait> traits = []> :
ReferableDeclOp<mnemonic, traits # [
ParentOneOf<[
"firrtl::FModuleOp", "firrtl::LayerBlockOp",
"firrtl::WhenOp", "firrtl::MatchOp"]>]> {}
"firrtl::WhenOp", "firrtl::MatchOp", "sv::IfDefOp"]>]> {}
def InstanceOp : HardwareDeclOp<"instance", [
DeclareOpInterfaceMethods<FInstanceLike>,

3
include/circt/Dialect/FIRRTL/FIRRTLDialect.td
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@ -39,7 +39,8 @@ def FIRRTLDialect : Dialect {
let dependentDialects = [
"circt::hw::HWDialect",
"circt::om::OMDialect"
"circt::om::OMDialect",
"circt::sv::SVDialect"
];
let extraClassDeclaration = [{

1
include/circt/Dialect/FIRRTL/FIRRTLOps.h
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@ -19,6 +19,7 @@
#include "circt/Dialect/HW/HWOpInterfaces.h"
#include "circt/Dialect/HW/HWTypes.h"
#include "circt/Dialect/HW/InnerSymbolTable.h"
#include "circt/Dialect/SV/SVOps.h"
#include "circt/Dialect/Seq/SeqAttributes.h"
#include "circt/Support/FieldRef.h"
#include "circt/Support/InstanceGraph.h"

1
lib/Dialect/FIRRTL/CMakeLists.txt
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@ -45,6 +45,7 @@ add_circt_dialect_library(CIRCTFIRRTL
CIRCTHW
CIRCTOM
CIRCTSeq
CIRCTSV
MLIRIR
MLIRPass
)

4
test/Dialect/FIRRTL/errors.mlir
View File

@ -279,7 +279,7 @@ firrtl.circuit "Foo" {
firrtl.circuit "Foo" {
firrtl.extmodule @Foo()
// expected-error @+1 {{'firrtl.instance' op expects parent op to be one of 'firrtl.module, firrtl.layerblock, firrtl.when, firrtl.match'}}
// expected-error @+1 {{'firrtl.instance' op expects parent op to be one of 'firrtl.module, firrtl.layerblock, firrtl.when, firrtl.match, sv.ifdef'}}
firrtl.instance "" @Foo()
}
@ -1829,7 +1829,7 @@ firrtl.circuit "ClassCannotHaveHardwarePorts" {
firrtl.circuit "ClassCannotHaveWires" {
firrtl.module @ClassCannotHaveWires() {}
firrtl.class @ClassWithWire() {
// expected-error @below {{'firrtl.wire' op expects parent op to be one of 'firrtl.module, firrtl.layerblock, firrtl.when, firrtl.match'}}
// expected-error @below {{'firrtl.wire' op expects parent op to be one of 'firrtl.module, firrtl.layerblock, firrtl.when, firrtl.match, sv.ifdef'}}
%w = firrtl.wire : !firrtl.uint<8>
}
}