mirror of https://github.com/llvm/circt.git
[LowerToHW] Fix symbol creation for empty names (#6282)
firrtl.instance with lowerToBind is lowered into bound instance and symbols are created for the instances. There was a bug that symbols were generated by instance names, not by an appropriate helper so there could have been name collisions. This commit fixes the issue by using inner symbol generation helper. This also fixes symbol creation for empty port names as well.
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@ -885,7 +885,9 @@ FIRRTLModuleLowering::lowerPorts(ArrayRef<PortInfo> firrtlPorts,
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ports.reserve(firrtlPorts.size());
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size_t numArgs = 0;
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size_t numResults = 0;
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for (auto firrtlPort : firrtlPorts) {
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for (auto e : llvm::enumerate(firrtlPorts)) {
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PortInfo firrtlPort = e.value();
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size_t portNo = e.index();
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hw::PortInfo hwPort;
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hwPort.name = firrtlPort.name;
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hwPort.type = loweringState.lowerType(firrtlPort.type, firrtlPort.loc);
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@ -907,10 +909,12 @@ FIRRTLModuleLowering::lowerPorts(ArrayRef<PortInfo> firrtlPorts,
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}
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continue;
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}
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hwPort.setSym(
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hw::InnerSymAttr::get(StringAttr::get(
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moduleOp->getContext(), Twine("__") + moduleName + Twine("__") +
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firrtlPort.name.strref())),
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moduleOp->getContext(),
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Twine("__") + moduleName + Twine("__DONTTOUCH__") +
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Twine(portNo) + Twine("__") + firrtlPort.name.strref())),
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moduleOp->getContext());
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}
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@ -3214,8 +3218,10 @@ LogicalResult FIRRTLLowering::visitDecl(InstanceOp oldInstance) {
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auto innerSym = oldInstance.getInnerSymAttr();
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if (oldInstance.getLowerToBind()) {
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if (!innerSym)
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innerSym = hw::InnerSymAttr::get(
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builder.getStringAttr("__" + oldInstance.getName() + "__"));
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std::tie(innerSym, std::ignore) = getOrAddInnerSym(
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oldInstance.getContext(), oldInstance.getInnerSymAttr(), 0,
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[&]() -> hw::InnerSymbolNamespace & { return moduleNamespace; });
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auto bindOp = builder.create<sv::BindOp>(theModule.getNameAttr(),
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innerSym.getSymName());
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// If the lowered op already had output file information, then use that.
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@ -286,11 +286,19 @@ firrtl.circuit "Simple" {
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// DontTouch on ports becomes symbol.
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// CHECK-LABEL: hw.module.extern private @PortDT
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// CHECK-SAME: (in %a : i1 {hw.exportPort = #hw<innerSym@__PortDT__a>}, in %hassym : i1 {hw.exportPort = #hw<innerSym@hassym>},
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// CHECK-SAME: out b : i2 {hw.exportPort = #hw<innerSym@__PortDT__b>})
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// CHECK-SAME: (in %a : i1 {hw.exportPort = #hw<innerSym@__PortDT__DONTTOUCH__0__a>}, in %hassym : i1 {hw.exportPort = #hw<innerSym@hassym>},
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// CHECK-SAME: out b : i2 {hw.exportPort = #hw<innerSym@__PortDT__DONTTOUCH__2__b>})
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firrtl.extmodule private @PortDT(
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in a: !firrtl.uint<1> [{class = "firrtl.transforms.DontTouchAnnotation"}],
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in hassym: !firrtl.uint<1> sym @hassym [{class = "firrtl.transforms.DontTouchAnnotation"}],
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out b: !firrtl.uint<2> [{class = "firrtl.transforms.DontTouchAnnotation"}]
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)
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// CHECK-LABEL: @PortDT2
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// CHECK-SAME: {hw.exportPort = #hw<innerSym@__PortDT2__DONTTOUCH__0__>}
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// CHECK-SAME: {hw.exportPort = #hw<innerSym@__PortDT2__DONTTOUCH__1__>}
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firrtl.module private @PortDT2(
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in %0: !firrtl.uint<1> [{class = "firrtl.transforms.DontTouchAnnotation"}],
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in %1: !firrtl.uint<1> [{class = "firrtl.transforms.DontTouchAnnotation"}]
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) {}
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}
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@ -589,8 +589,9 @@ firrtl.circuit "Simple" attributes {annotations = [{class =
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%1455 = builtin.unrealized_conversion_cast %hits_1_7 : !firrtl.uint<1> to !firrtl.uint<1>
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}
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// CHECK: sv.bind <@bindTest::@[[bazSymbol:.+]]>
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// CHECK: sv.bind <@bindTest::@[[bazSymbol:sym]]>
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// CHECK-NOT: output_file
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// CHECK: sv.bind <@bindTest::@[[bazSymbol2:sym_0]]>
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// CHECK-NEXT: sv.bind <@bindTest::@[[quxSymbol:.+]]> {
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// CHECK-SAME: output_file = #hw.output_file<"bindings.sv", excludeFromFileList>
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// CHECK-NEXT: hw.module private @bindTest(in %dummy : i1)
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@ -598,6 +599,9 @@ firrtl.circuit "Simple" attributes {annotations = [{class =
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// CHECK: hw.instance "baz" sym @[[bazSymbol]] @bar
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%baz = firrtl.instance baz {lowerToBind} @bar(in io_cpu_flush: !firrtl.uint<1>)
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firrtl.connect %baz, %dummy : !firrtl.uint<1>, !firrtl.uint<1>
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// CHECK: hw.instance "baz" sym @[[bazSymbol2]] @bar
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%baz_dup = firrtl.instance baz {lowerToBind} @bar(in io_cpu_flush: !firrtl.uint<1>)
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firrtl.connect %baz_dup, %dummy : !firrtl.uint<1>, !firrtl.uint<1>
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// CHECK: hw.instance "qux" sym @[[quxSymbol]] @bar
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%qux = firrtl.instance qux {lowerToBind, output_file = #hw.output_file<"bindings.sv", excludeFromFileList>} @bar(in io_cpu_flush: !firrtl.uint<1>)
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