mirror of https://github.com/llvm/circt.git
[FIRRTL] Support properties in aggregates, remove immediately. (#5993)
* Use AtomicFieldIDTypeInterface, move Properties to implement it. * Update tests to reflect IR changes. * LOA: Support properties as well.
This commit is contained in:
Will Dietz
GitHub
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b377f883de
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@ -544,7 +544,12 @@ def BaseTypeAliasImpl : FIRRTLImplType<"BaseTypeAlias", [FieldIDTypeInterface],
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// Non-Hardware Type Definitions
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//===----------------------------------------------------------------------===//
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def ClassImpl : FIRRTLImplType<"Class", [], "circt::firrtl::FIRRTLType"> {
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class PropImplType<string name,
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list<Trait> traits = [],
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string baseCppClass = "::circt::firrtl::FIRRTLType">
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: FIRRTLImplType<name, traits # [ AtomicFieldIDTypeInterface ], baseCppClass>;
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def ClassImpl : PropImplType<"Class"> {
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let summary = [{
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An instance of a class.
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@ -588,26 +593,26 @@ def ClassImpl : FIRRTLImplType<"Class", [], "circt::firrtl::FIRRTLType"> {
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}];
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}
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def StringImpl : FIRRTLImplType<"String", [], "circt::firrtl::FIRRTLType"> {
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def StringImpl : PropImplType<"String"> {
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let summary = "An unlimited length string type. Not representable in hardware.";
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let parameters = (ins);
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let genStorageClass = true;
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}
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def IntegerImpl : FIRRTLImplType<"FInteger", [], "circt::firrtl::FIRRTLType"> {
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def IntegerImpl : PropImplType<"FInteger"> {
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let summary = "An unlimited length signed integer type. Not representable in hardware.";
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let parameters = (ins);
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let genStorageClass = true;
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}
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def ListImpl : FIRRTLImplType<"List", [], "circt::firrtl::FIRRTLType"> {
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def ListImpl : PropImplType<"List"> {
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let summary = "A typed property list of any length. Not representable in hardware.";
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let parameters = (ins TypeParameter<"circt::firrtl::PropertyType", "element type">:$elementType);
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let genStorageClass = true;
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let genAccessors = true;
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}
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def MapImpl : FIRRTLImplType<"Map", [], "circt::firrtl::FIRRTLType"> {
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def MapImpl : PropImplType<"Map"> {
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let summary = "A typed map of properties. Not representable in hardware.";
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let parameters = (ins TypeParameter<"circt::firrtl::PropertyType", "key type">:$keyType,
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TypeParameter<"circt::firrtl::PropertyType", "value type">:$valueType);
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@ -615,14 +620,14 @@ def MapImpl : FIRRTLImplType<"Map", [], "circt::firrtl::FIRRTLType"> {
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let genAccessors = true;
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}
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def PathImpl : FIRRTLImplType<"Path", [], "circt::firrtl::FIRRTLType"> {
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def PathImpl : PropImplType<"Path"> {
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let summary = "A path to a hardware entity. Not representable in hardware.";
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let parameters = (ins);
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let genStorageClass = true;
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let genAccessors = true;
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}
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def BoolImpl : FIRRTLImplType<"Bool", [], "circt::firrtl::FIRRTLType"> {
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def BoolImpl : PropImplType<"Bool"> {
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let summary = "A boolean property. Not representable in hardware.";
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let parameters = (ins);
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let genStorageClass = true;
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@ -11,7 +11,7 @@
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// aggregate types with hardware aggregates, with non-hardware fields
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// expanded out as with LowerTypes.
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//
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// This pass is ref-specific for now.
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// This pass supports reference and property types.
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//
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//===----------------------------------------------------------------------===//
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@ -39,7 +39,7 @@ using namespace firrtl;
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namespace {
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/// Information on non-hw (ref) elements.
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/// Information on non-hw (ref/prop) elements.
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struct NonHWField {
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/// Type of the field, not a hardware type.
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FIRRTLType type;
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@ -176,7 +176,7 @@ public:
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if (!llvm::all_of(op->getOperandTypes(), notOpenAggType) ||
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!llvm::all_of(op->getResultTypes(), notOpenAggType))
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return op->emitOpError(
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"unhandled use or producer of types containing references");
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"unhandled use or producer of types containing non-hw types");
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return success();
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}
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@ -656,7 +656,7 @@ FailureOr<PortMappingInfo> Visitor::mapPortType(Type type, Location errorLoc,
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return FVectorType::get(convert, ovTy.getNumElements(),
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ovTy.isConst());
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})
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.template Case<RefType>([&](auto ref) {
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.template Case<RefType, PropertyType>([&](auto ref) {
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// Do this better, don't re-serialize so much?
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auto f = NonHWField{ref, fieldID, flip, {}};
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suffix.toVector(f.suffix);
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@ -1841,14 +1841,6 @@ firrtl.circuit "ConstOpenVector" {
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firrtl.extmodule @ConstOpenVector(out out : !firrtl.const.openvector<probe<uint<1>>, 2>)
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}
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// -----
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// Elements must support FieldID's.
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firrtl.circuit "OpenVectorNotFieldID" {
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// expected-error @below {{vector element type does not support fieldID's, type: '!firrtl.string'}}
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firrtl.extmodule @OpenVectorNotFieldID(out out : !firrtl.openvector<string, 2>)
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}
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// -----
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// No const with probes within.
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@ -1857,14 +1849,6 @@ firrtl.circuit "ConstOpenBundle" {
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firrtl.extmodule @ConstOpenBundle(out out : !firrtl.const.openbundle<x: probe<uint<1>>>)
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}
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// -----
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// Elements must support FieldID's.
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firrtl.circuit "OpenBundleNotFieldID" {
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// expected-error @below {{bundle element "a" has unsupported type that does not support fieldID's: '!firrtl.string'}}
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firrtl.extmodule @OpenBundleNotFieldID(out out : !firrtl.openbundle<a: string>)
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}
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// -----
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// Strict connect between non-equivalent anonymous type operands.
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@ -55,7 +55,7 @@ firrtl.circuit "UnhandledOp" {
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%r_p = firrtl.opensubfield %r[p] : !firrtl.openbundle<p: probe<uint<1>>>
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firrtl.ref.define %r_p, %ref : !firrtl.probe<uint<1>>
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// expected-error @below {{unhandled use or producer of types containing references}}
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// expected-error @below {{unhandled use or producer of types containing non-hw types}}
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%x = firrtl.wire : !firrtl.openbundle<p : probe<uint<1>>>
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}
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}
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@ -207,3 +207,29 @@ firrtl.circuit "ManySymbols" {
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<@x1,7,public>, <@x1_data,10,public>,
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<@b,11,public>])
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}
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// -----
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// CHECK-LABEL: circuit "BundleOfProps"
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firrtl.circuit "BundleOfProps" {
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// CHECK: module @BundleOfProps
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// CHECK-SAME: in %x: !firrtl.bundle<b: uint<5>>,
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// CHECK-SAME: in %x_a: !firrtl.string,
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// CHECK-SAME: out %y: !firrtl.bundle<a: uint<5>>,
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// CHECK-SAME: out %y_b_c_l: !firrtl.list<string>)
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firrtl.module @BundleOfProps(in %x: !firrtl.openbundle<a: string, b: uint<5>>,
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out %y: !firrtl.openbundle<a: uint<5>,
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b flip: openbundle<c flip: openbundle<l: list<string>>>>) {
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%x_a = firrtl.opensubfield %x[a] : !firrtl.openbundle<a: string, b: uint<5>>
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%x_b = firrtl.opensubfield %x[b] : !firrtl.openbundle<a: string, b: uint<5>>
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%y_a = firrtl.opensubfield %y[a] : !firrtl.openbundle<a: uint<5>, b flip: openbundle<c flip: openbundle<l: list<string>>>>
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%y_b = firrtl.opensubfield %y[b] : !firrtl.openbundle<a: uint<5>, b flip: openbundle<c flip: openbundle<l: list<string>>>>
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%y_b_c = firrtl.opensubfield %y_b[c] : !firrtl.openbundle<c flip: openbundle<l: list<string>>>
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%y_b_c_l = firrtl.opensubfield %y_b_c[l] : !firrtl.openbundle<l: list<string>>
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%str = firrtl.string "test"
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%list = firrtl.list.create %x_a, %str : !firrtl.list<string>
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firrtl.propassign %y_b_c_l, %list : !firrtl.list<string>
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firrtl.strictconnect %y_a, %x_b : !firrtl.uint<5>
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}
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}
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@ -1813,3 +1813,22 @@ circuit BasicProps :
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; CHECK-NEXT: %[[EMPTY:.+]] = firrtl.map.create : !firrtl.map<integer, integer>
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; CHECK-NEXT: firrtl.propassign %empty, %[[EMPTY]]
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propassign empty, Map<Integer, Integer>()
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;// -----
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FIRRTL version 3.1.0
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; CHECK-LABEL: circuit "BundleOfProps"
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circuit BundleOfProps:
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module BundleOfProps:
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input x : {a : String}
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; CHECK: openbundle<a: string>
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;// -----
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FIRRTL version 3.1.0
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; CHECK-LABEL: circuit "VecOfProps"
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circuit VecOfProps:
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module VecOfProps:
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input x : String[2]
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; CHECK: openvector<string, 2>
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@ -782,23 +782,6 @@ circuit KeywordTypeName:
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circuit KeywordTypeName:
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type module = UInt; expected-error {{cannot use keyword 'module' for type alias name}}
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;// -----
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; https://github.com/llvm/circt/issues/5494
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FIRRTL version 3.1.0
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circuit BundleOfProps:
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module BundleOfProps:
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input x : {a : String}
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; expected-error @above {{type '!firrtl.string' cannot be used as field in a bundle}}
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;// -----
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FIRRTL version 3.1.0
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circuit VecOfProps:
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module VecOfProps:
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input x : String[2]
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; expected-error @above {{type '!firrtl.string' cannot be used in a vector}}
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;// -----
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FIRRTL version 3.0.0
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