mirror of https://github.com/llvm/circt.git
[FIRRTL] Add start of FIRRTL types lowering (#157)
* [FIRRTL] Add start of FIRRTL types lowering This adds a new pass to lower FIRRTL types, initially focused on bundle types. This flattens bundle types in module and instance ports, and deals with the flattened values in subfield and connect operations. Starts to resolve #123.
This commit is contained in:
mikeurbach
GitHub
parent
66da348c3b
commit
a0f04b14ed
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@ -24,6 +24,7 @@ namespace firrtl {
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std::unique_ptr<mlir::Pass> createLowerFIRRTLToRTLModulePass();
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std::unique_ptr<mlir::Pass> createLowerFIRRTLToRTLPass();
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std::unique_ptr<mlir::Pass> createLowerFIRRTLTypesPass();
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} // namespace firrtl
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} // namespace circt
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@ -9,6 +9,12 @@
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include "mlir/Pass/PassBase.td"
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/// Lower firrtl.module port types to ground types.
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def LowerFIRRTLTypes : Pass<"lower-firrtl-types", "firrtl::FModuleOp"> {
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let summary = "Lower FIRRTL types to ground types";
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let constructor = "circt::firrtl::createLowerFIRRTLTypesPass()";
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}
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/// Lower firrtl.module's to rtl.module.
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def LowerFIRRTLToRTLModule
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: Pass<"lower-firrtl-to-rtl-module", "ModuleOp"> {
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@ -2,6 +2,7 @@
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//
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//===----------------------------------------------------------------------===//
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#include "PassDetails.h"
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#include "circt/Dialect/FIRRTL/Ops.h"
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#include "circt/Dialect/FIRRTL/Passes.h"
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#include "circt/Dialect/FIRRTL/Visitors.h"
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@ -19,9 +20,6 @@ static T getTypeOf(Value v) {
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return v.getType().cast<T>();
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}
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#define GEN_PASS_CLASSES
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#include "circt/Dialect/FIRRTL/FIRRTLPasses.h.inc"
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/// Given a FIRRTL type, return the corresponding type for the RTL dialect.
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/// This returns a null type if it cannot be lowered.
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static Type lowerType(Type type) {
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@ -0,0 +1,370 @@
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//===- LowerTypes.cpp - Lower FIRRTL types to ground types ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//===----------------------------------------------------------------------===//
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#include "PassDetails.h"
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#include "circt/Dialect/FIRRTL/Ops.h"
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#include "circt/Dialect/FIRRTL/Passes.h"
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#include "circt/Dialect/FIRRTL/Types.h"
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#include "circt/Dialect/FIRRTL/Visitors.h"
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#include "circt/Support/ImplicitLocOpBuilder.h"
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using namespace circt;
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using namespace firrtl;
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// This represents a flattened bundle field element.
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struct FlatBundleFieldEntry {
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// This is the underlying ground type of the field.
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FIRRTLType type;
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// This is a suffix to add to the field name to make it unique.
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std::string suffix;
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// This indicates whether the field was flipped to be an output.
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bool isOutput;
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// Helper to determine if a fully flattened type needs to be flipped.
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FIRRTLType getPortType() { return isOutput ? FlipType::get(type) : type; }
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};
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// Convert a nested bundle of fields into a flat list of fields. This is used
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// when working with instances and mems to flatten them.
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static void flattenBundleTypes(FIRRTLType type, StringRef suffixSoFar,
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bool isFlipped,
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SmallVectorImpl<FlatBundleFieldEntry> &results) {
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if (auto flip = type.dyn_cast<FlipType>())
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return flattenBundleTypes(flip.getElementType(), suffixSoFar, !isFlipped,
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results);
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// In the base case we record this field.
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auto bundle = type.dyn_cast<BundleType>();
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if (!bundle) {
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results.push_back({type, suffixSoFar.str(), isFlipped});
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return;
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}
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SmallString<16> tmpSuffix(suffixSoFar);
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// Otherwise, we have a bundle type. Break it down.
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for (auto &elt : bundle.getElements()) {
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// Construct the suffix to pass down.
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tmpSuffix.resize(suffixSoFar.size());
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tmpSuffix.push_back('_');
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tmpSuffix.append(elt.first.strref());
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// Recursively process subelements.
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flattenBundleTypes(elt.second, tmpSuffix, isFlipped, results);
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}
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}
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//===----------------------------------------------------------------------===//
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// Pass Infrastructure
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//===----------------------------------------------------------------------===//
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namespace {
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struct FIRRTLTypesLowering : public LowerFIRRTLTypesBase<FIRRTLTypesLowering>,
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public FIRRTLVisitor<FIRRTLTypesLowering> {
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using ValueIdentifier = std::pair<Value, Identifier>;
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using FIRRTLVisitor<FIRRTLTypesLowering>::visitDecl;
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using FIRRTLVisitor<FIRRTLTypesLowering>::visitExpr;
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using FIRRTLVisitor<FIRRTLTypesLowering>::visitStmt;
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void runOnOperation() override;
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// Lowering operations.
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void visitDecl(InstanceOp op);
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void visitExpr(SubfieldOp op);
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void visitStmt(ConnectOp op);
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private:
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// Lowering module block arguments.
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void lowerArg(BlockArgument arg, FIRRTLType type);
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// Helpers to manage state.
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Value addArg(Type type, unsigned oldArgNumber, StringRef nameSuffix = "");
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void setBundleLowering(Value oldValue, StringRef flatField, Value newValue);
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Value getBundleLowering(Value oldValue, StringRef flatField);
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void getAllBundleLowerings(Value oldValue, SmallVectorImpl<Value> &results);
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// The builder is set and maintained in the main loop.
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ImplicitLocOpBuilder *builder;
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// State to keep track of arguments and operations to clean up at the end.
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SmallVector<unsigned, 8> argsToRemove;
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SmallVector<Operation *, 16> opsToRemove;
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// State to keep a mapping from (Value, Identifier) pairs to flattened values.
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DenseMap<ValueIdentifier, Value> loweredBundleValues;
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};
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} // end anonymous namespace
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/// This is the pass constructor.
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std::unique_ptr<mlir::Pass> circt::firrtl::createLowerFIRRTLTypesPass() {
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return std::make_unique<FIRRTLTypesLowering>();
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}
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// This is the main entrypoint for the lowering pass.
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void FIRRTLTypesLowering::runOnOperation() {
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auto module = getOperation();
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auto *body = module.getBodyBlock();
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ImplicitLocOpBuilder theBuilder(module.getLoc(), &getContext());
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builder = &theBuilder;
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// Lower the module block arguments.
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SmallVector<BlockArgument, 8> args(body->args_begin(), body->args_end());
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for (auto arg : args)
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if (auto type = arg.getType().dyn_cast<FIRRTLType>())
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lowerArg(arg, type);
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// Lower the operations.
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for (auto &op : body->getOperations()) {
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builder->setInsertionPoint(&op);
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builder->setLoc(op.getLoc());
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dispatchVisitor(&op);
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}
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// Remove ops that have been lowered.
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while (!opsToRemove.empty())
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opsToRemove.pop_back_val()->erase();
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// Remove args that have been lowered.
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getOperation().eraseArguments(argsToRemove);
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argsToRemove.clear();
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// Reset lowered state.
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loweredBundleValues.clear();
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}
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//===----------------------------------------------------------------------===//
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// Lowering module block arguments.
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//===----------------------------------------------------------------------===//
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// Lower arguments with bundle type by flattening them.
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void FIRRTLTypesLowering::lowerArg(BlockArgument arg, FIRRTLType type) {
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unsigned argNumber = arg.getArgNumber();
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// Flatten any bundle types.
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SmallVector<FlatBundleFieldEntry, 8> fieldTypes;
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flattenBundleTypes(type, "", false, fieldTypes);
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for (auto field : fieldTypes) {
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// Create new block arguments.
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auto type = field.getPortType();
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auto newValue = addArg(type, argNumber, field.suffix);
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// If this field was flattened from a bundle.
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if (!field.suffix.empty()) {
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// Remove field separator prefix for consitency with the rest of the pass.
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auto fieldName = StringRef(field.suffix).drop_front(1);
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// Map the flattened suffix for the original bundle to the new value.
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setBundleLowering(arg, fieldName, newValue);
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} else {
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// Lower any other arguments by copying them to keep the relative order.
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arg.replaceAllUsesWith(newValue);
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}
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}
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// Remember to remove the original block argument.
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argsToRemove.push_back(argNumber);
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}
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//===----------------------------------------------------------------------===//
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// Lowering operations.
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//===----------------------------------------------------------------------===//
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// Lower instance operations in the same way as module block arguments. Bundles
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// are flattened, and other arguments are copied to keep the relative order. By
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// ensuring both lowerings are the same, we can process every module in the
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// circuit in parallel, and every instance will have the correct ports.
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void FIRRTLTypesLowering::visitDecl(InstanceOp op) {
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// The instance's ports are represented as one value with a bundle type.
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BundleType originalType = op.result().getType().cast<BundleType>();
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// Create a new, flat bundle type for the new result
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SmallVector<BundleType::BundleElement, 8> bundleElements;
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for (auto element : originalType.getElements()) {
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// Flatten any nested bundle types the usual way.
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SmallVector<FlatBundleFieldEntry, 8> fieldTypes;
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flattenBundleTypes(element.second, element.first, false, fieldTypes);
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for (auto field : fieldTypes) {
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// Store the flat type for the new bundle type.
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auto flatName = builder->getIdentifier(field.suffix);
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auto flatType = field.getPortType();
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auto newElement = BundleType::BundleElement(flatName, flatType);
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bundleElements.push_back(newElement);
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}
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}
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// Get the new bundle type and create a new instance.
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auto newType = BundleType::get(bundleElements, &getContext());
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auto newInstance =
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builder->create<InstanceOp>(newType, op.moduleNameAttr(), op.nameAttr());
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// Create new subfield ops for each field of the instance.
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for (auto element : bundleElements) {
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auto newSubfield =
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builder->create<SubfieldOp>(element.second, newInstance, element.first);
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// Map the flattened suffix for the original bundle to the new value.
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setBundleLowering(op, element.first, newSubfield);
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}
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// Remember to remove the original op.
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opsToRemove.push_back(op);
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}
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// Lowering subfield operations has to deal with three different cases:
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// a) the input value is from a module block argument
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// b) the input value is from another subfield operation's result
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// c) the input value is from an instance
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//
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// This is accomplished by storing value and suffix mappings that point to the
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// flattened value. If the subfield op is accessing the leaf field of a bundle,
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// it replaces all uses with the flattened value. Otherwise, it flattens the
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// rest of the bundle and adds the flattened values to the mapping for each
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// partial suffix.
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void FIRRTLTypesLowering::visitExpr(SubfieldOp op) {
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Value input = op.input();
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Value result = op.result();
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StringRef fieldname = op.fieldname();
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FIRRTLType resultType = result.getType().cast<FIRRTLType>();
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// Flatten any nested bundle types the usual way.
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SmallVector<FlatBundleFieldEntry, 8> fieldTypes;
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flattenBundleTypes(resultType, fieldname, false, fieldTypes);
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for (auto field : fieldTypes) {
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// Look up the mapping for this suffix.
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auto newValue = getBundleLowering(input, field.suffix);
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// The prefix is the field name and possibly field separator.
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auto prefixSize = fieldname.size();
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if (field.suffix.size() > fieldname.size())
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prefixSize += 1;
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// Get the remaining field suffix by removing the prefix.
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auto partialSuffix = StringRef(field.suffix).drop_front(prefixSize);
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// If we are at the leaf of a bundle.
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if (partialSuffix.empty())
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// Replace the result with the flattened value.
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result.replaceAllUsesWith(newValue);
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else
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// Map the partial suffix for the result value to the flattened value.
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setBundleLowering(result, partialSuffix, newValue);
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}
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// Remember to remove the original op.
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opsToRemove.push_back(op);
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}
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// Lowering connects only has to deal with one special case: connecting two
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// bundles. This situation should only arise when both of the arguments are a
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// bundle that was:
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// a) originally a block argument
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// b) originally an instance's port
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//
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// When two such bundles are connected, none of the subfield visits have a
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// chance to lower them, so we must ensure they have the same number of
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// flattened values and flatten out this connect into multiple connects.
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void FIRRTLTypesLowering::visitStmt(ConnectOp op) {
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Value dest = op.dest();
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Value src = op.src();
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// If we aren't connecting two bundles, there is nothing to do.
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if (!dest.getType().isa<BundleType>() || !src.getType().isa<BundleType>())
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return;
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// Get the lowered values for each side.
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SmallVector<Value, 8> destValues;
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getAllBundleLowerings(dest, destValues);
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SmallVector<Value, 8> srcValues;
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getAllBundleLowerings(src, srcValues);
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// Check that we got out the same number of values from each bundle.
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assert(destValues.size() == srcValues.size() &&
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"connected bundles don't match");
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for (auto tuple : llvm::zip_first(destValues, srcValues)) {
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Value newDest = std::get<0>(tuple);
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Value newSrc = std::get<1>(tuple);
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builder->create<ConnectOp>(newDest, newSrc);
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}
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// Remember to remove the original op.
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opsToRemove.push_back(op);
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}
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//===----------------------------------------------------------------------===//
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// Helpers to manage state.
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//===----------------------------------------------------------------------===//
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static DictionaryAttr getArgAttrs(StringAttr nameAttr, StringRef suffix,
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OpBuilder *builder) {
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SmallString<16> newName(nameAttr.getValue());
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newName += suffix;
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StringAttr newNameAttr = builder->getStringAttr(newName);
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auto attr = builder->getNamedAttr("firrtl.name", newNameAttr);
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return builder->getDictionaryAttr(attr);
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}
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// Creates and returns a new block argument of the specified type to the module.
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// This also maintains the name attribute for the new argument, possibly with a
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// new suffix appended.
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Value FIRRTLTypesLowering::addArg(Type type, unsigned oldArgNumber,
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StringRef nameSuffix) {
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FModuleOp module = getOperation();
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Block *body = module.getBodyBlock();
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// Append the new argument.
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auto newValue = body->addArgument(type);
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// Keep the module's type up-to-date.
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module.setType(builder->getFunctionType(body->getArgumentTypes(), {}));
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// Copy over the name attribute for the new argument.
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StringAttr nameAttr = getFIRRTLNameAttr(module.getArgAttrs(oldArgNumber));
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if (nameAttr) {
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auto newArgAttrs = getArgAttrs(nameAttr, nameSuffix, builder);
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module.setArgAttrs(newValue.getArgNumber(), newArgAttrs);
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}
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return newValue;
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}
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// Store the mapping from a bundle typed value to a mapping from its field names
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// to flat values.
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void FIRRTLTypesLowering::setBundleLowering(Value oldValue, StringRef flatField,
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Value newValue) {
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auto flatFieldId = builder->getIdentifier(flatField);
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auto &entry = loweredBundleValues[ValueIdentifier(oldValue, flatFieldId)];
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assert(!entry && "bundle lowering has already been set");
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entry = newValue;
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}
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// For a mapped bundle typed value and a flat subfield name, retrieve and return
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// the flat value if it exists.
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Value FIRRTLTypesLowering::getBundleLowering(Value oldValue,
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StringRef flatField) {
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auto flatFieldId = builder->getIdentifier(flatField);
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auto &entry = loweredBundleValues[ValueIdentifier(oldValue, flatFieldId)];
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assert(entry && "bundle lowering was not set");
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return entry;
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}
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// For a mapped bundle typed value, retrieve and return the flat values for each
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// field.
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void FIRRTLTypesLowering::getAllBundleLowerings(
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Value value, SmallVectorImpl<Value> &results) {
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BundleType bundleType = value.getType().cast<BundleType>();
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for (auto element : bundleType.getElements())
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results.push_back(getBundleLowering(value, element.first));
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}
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@ -0,0 +1,24 @@
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//===- PassDetails.h - FIRRTL pass class details ----------------*- C++ -*-===//
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//
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//===----------------------------------------------------------------------===//
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// clang-tidy seems to expect the absolute path in the header guard on some
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// systems, so just disable it.
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// NOLINTNEXTLINE(llvm-header-guard)
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#ifndef DIALECT_FIRRTL_PASSDETAILS_H
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#define DIALECT_FIRRTL_PASSDETAILS_H
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#include "circt/Dialect/FIRRTL/Ops.h"
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#include "circt/Dialect/RTL/Ops.h"
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#include "mlir/Pass/Pass.h"
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namespace circt {
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namespace firrtl {
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#define GEN_PASS_CLASSES
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#include "circt/Dialect/FIRRTL/FIRRTLPasses.h.inc"
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} // namespace firrtl
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} // namespace circt
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#endif // DIALECT_FIRRTL_PASSDETAILS_H
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@ -0,0 +1,99 @@
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// RUN: circt-opt -pass-pipeline='firrtl.circuit(lower-firrtl-types)' %s | FileCheck %s
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firrtl.circuit "TopLevel" {
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// CHECK-LABEL: firrtl.module @Simple
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// CHECK-SAME: %[[SOURCE_VALID_NAME:source_valid]]: [[SOURCE_VALID_TYPE:!firrtl.uint<1>]]
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// CHECK-SAME: %[[SOURCE_READY_NAME:source_ready]]: [[SOURCE_READY_TYPE:!firrtl.flip<uint<1>>]]
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// CHECK-SAME: %[[SOURCE_DATA_NAME:source_data]]: [[SOURCE_DATA_TYPE:!firrtl.uint<64>]]
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// CHECK-SAME: %[[SINK_VALID_NAME:sink_valid]]: [[SINK_VALID_TYPE:!firrtl.flip<uint<1>>]]
|
||||
// CHECK-SAME: %[[SINK_READY_NAME:sink_ready]]: [[SINK_READY_TYPE:!firrtl.uint<1>]]
|
||||
// CHECK-SAME: %[[SINK_DATA_NAME:sink_data]]: [[SINK_DATA_TYPE:!firrtl.flip<uint<64>>]]
|
||||
firrtl.module @Simple(%source: !firrtl.bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>,
|
||||
%sink: !firrtl.bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>) {
|
||||
|
||||
// CHECK-NEXT: firrtl.when %[[SOURCE_VALID_NAME]]
|
||||
// CHECK-NEXT: firrtl.connect %[[SINK_DATA_NAME]], %[[SOURCE_DATA_NAME]] : [[SINK_DATA_TYPE]], [[SOURCE_DATA_TYPE]]
|
||||
// CHECK-NEXT: firrtl.connect %[[SINK_VALID_NAME]], %[[SOURCE_VALID_NAME]] : [[SINK_VALID_TYPE]], [[SOURCE_VALID_TYPE]]
|
||||
// CHECK-NEXT: firrtl.connect %[[SOURCE_READY_NAME]], %[[SINK_READY_NAME]] : [[SOURCE_READY_TYPE]], [[SINK_READY_TYPE]]
|
||||
|
||||
%0 = firrtl.subfield %source("valid") : (!firrtl.bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>) -> !firrtl.uint<1>
|
||||
%1 = firrtl.subfield %source("ready") : (!firrtl.bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>) -> !firrtl.flip<uint<1>>
|
||||
%2 = firrtl.subfield %source("data") : (!firrtl.bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>) -> !firrtl.uint<64>
|
||||
%3 = firrtl.subfield %sink("valid") : (!firrtl.bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>) -> !firrtl.flip<uint<1>>
|
||||
%4 = firrtl.subfield %sink("ready") : (!firrtl.bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>) -> !firrtl.uint<1>
|
||||
%5 = firrtl.subfield %sink("data") : (!firrtl.bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>) -> !firrtl.flip<uint<64>>
|
||||
firrtl.when %0 {
|
||||
firrtl.connect %5, %2 : !firrtl.flip<uint<64>>, !firrtl.uint<64>
|
||||
firrtl.connect %3, %0 : !firrtl.flip<uint<1>>, !firrtl.uint<1>
|
||||
firrtl.connect %1, %4 : !firrtl.flip<uint<1>>, !firrtl.uint<1>
|
||||
}
|
||||
}
|
||||
|
||||
// CHECK-LABEL: firrtl.module @Recursive
|
||||
// CHECK-SAME: %[[FLAT_ARG_1_NAME:arg_foo_bar_baz]]: [[FLAT_ARG_1_TYPE:!firrtl.uint<1>]]
|
||||
// CHECK-SAME: %[[FLAT_ARG_2_NAME:arg_foo_qux]]: [[FLAT_ARG_2_TYPE:!firrtl.sint<64>]]
|
||||
// CHECK-SAME: %[[OUT_1_NAME:out1]]: [[OUT_1_TYPE:!firrtl.flip<uint<1>>]]
|
||||
// CHECK-SAME: %[[OUT_2_NAME:out2]]: [[OUT_2_TYPE:!firrtl.flip<sint<64>>]]
|
||||
firrtl.module @Recursive(%arg: !firrtl.bundle<foo: bundle<bar: bundle<baz: uint<1>>, qux: sint<64>>>,
|
||||
%out1: !firrtl.flip<uint<1>>, %out2: !firrtl.flip<sint<64>>) {
|
||||
|
||||
// CHECK-NEXT: firrtl.connect %[[OUT_1_NAME]], %[[FLAT_ARG_1_NAME]] : [[OUT_1_TYPE]], [[FLAT_ARG_1_TYPE]]
|
||||
// CHECK-NEXT: firrtl.connect %[[OUT_2_NAME]], %[[FLAT_ARG_2_NAME]] : [[OUT_2_TYPE]], [[FLAT_ARG_2_TYPE]]
|
||||
|
||||
%0 = firrtl.subfield %arg("foo") : (!firrtl.bundle<foo: bundle<bar: bundle<baz: uint<1>>, qux: sint<64>>>) -> !firrtl.bundle<bar: bundle<baz: uint<1>>, qux: sint<64>>
|
||||
%1 = firrtl.subfield %0("bar") : (!firrtl.bundle<bar: bundle<baz: uint<1>>, qux: sint<64>>) -> !firrtl.bundle<baz: uint<1>>
|
||||
%2 = firrtl.subfield %1("baz") : (!firrtl.bundle<baz: uint<1>>) -> !firrtl.uint<1>
|
||||
%3 = firrtl.subfield %0("qux") : (!firrtl.bundle<bar: bundle<baz: uint<1>>, qux: sint<64>>) -> !firrtl.sint<64>
|
||||
firrtl.connect %out1, %2 : !firrtl.flip<uint<1>>, !firrtl.uint<1>
|
||||
firrtl.connect %out2, %3 : !firrtl.flip<sint<64>>, !firrtl.sint<64>
|
||||
}
|
||||
|
||||
// CHECK-LABEL: firrtl.module @Uniquification
|
||||
// CHECK-SAME: %[[FLATTENED_ARG:a_b]]: [[FLATTENED_TYPE:!firrtl.uint<1>]],
|
||||
// CHECK-NOT: %[[FLATTENED_ARG]]
|
||||
// CHECK-SAME: %[[RENAMED_ARG:a_b.+]]: [[RENAMED_TYPE:!firrtl.uint<1>]] {firrtl.name = "[[FLATTENED_ARG]]"}
|
||||
firrtl.module @Uniquification(%a: !firrtl.bundle<b: uint<1>>, %a_b: !firrtl.uint<1>) {
|
||||
}
|
||||
|
||||
// CHECK-LABEL: firrtl.module @TopLevel
|
||||
// CHECK-SAME: %[[SOURCE_VALID_NAME:source_valid]]: [[SOURCE_VALID_TYPE:!firrtl.uint<1>]]
|
||||
// CHECK-SAME: %[[SOURCE_READY_NAME:source_ready]]: [[SOURCE_READY_TYPE:!firrtl.flip<uint<1>>]]
|
||||
// CHECK-SAME: %[[SOURCE_DATA_NAME:source_data]]: [[SOURCE_DATA_TYPE:!firrtl.uint<64>]]
|
||||
// CHECK-SAME: %[[SINK_VALID_NAME:sink_valid]]: [[SINK_VALID_TYPE:!firrtl.flip<uint<1>>]]
|
||||
// CHECK-SAME: %[[SINK_READY_NAME:sink_ready]]: [[SINK_READY_TYPE:!firrtl.uint<1>]]
|
||||
// CHECK-SAME: %[[SINK_DATA_NAME:sink_data]]: [[SINK_DATA_TYPE:!firrtl.flip<uint<64>>]]
|
||||
firrtl.module @TopLevel(%source: !firrtl.bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>,
|
||||
%sink: !firrtl.bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>) {
|
||||
|
||||
// CHECK-NEXT: %[[INSTANCE:.+]] = firrtl.instance @Simple
|
||||
// CHECK-SAME: !firrtl.bundle
|
||||
// CHECK-SAME: [[SUB_SOURCE_VALID_NAME:source_valid]]: [[SUB_SOURCE_VALID_TYPE:flip<uint<1>>]]
|
||||
// CHECK-SAME: [[SUB_SOURCE_READY_NAME:source_ready]]: [[SUB_SOURCE_READY_TYPE:uint<1>]]
|
||||
// CHECK-SAME: [[SUB_SOURCE_DATA_NAME:source_data]]: [[SUB_SOURCE_DATA_TYPE:flip<uint<64>>]]
|
||||
// CHECK-SAME: [[SUB_SINK_VALID_NAME:sink_valid]]: [[SUB_SINK_VALID_TYPE:uint<1>]]
|
||||
// CHECK-SAME: [[SUB_SINK_READY_NAME:sink_ready]]: [[SUB_SINK_READY_TYPE:flip<uint<1>>]]
|
||||
// CHECK-SAME: [[SUB_SINK_DATA_NAME:sink_data]]: [[SUB_SINK_DATA_TYPE:uint<64>]]
|
||||
%0 = firrtl.instance @Simple {name = ""} : !firrtl.bundle<source: bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>, sink: bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>>
|
||||
|
||||
// CHECK-NEXT: %[[FIELD1:.+]] = firrtl.subfield %[[INSTANCE]]("[[SUB_SOURCE_VALID_NAME]]") {{.*}} [[SUB_SOURCE_VALID_TYPE]]
|
||||
// CHECK-NEXT: %[[FIELD2:.+]] = firrtl.subfield %[[INSTANCE]]("[[SUB_SOURCE_READY_NAME]]") {{.*}} [[SUB_SOURCE_READY_TYPE]]
|
||||
// CHECK-NEXT: %[[FIELD3:.+]] = firrtl.subfield %[[INSTANCE]]("[[SUB_SOURCE_DATA_NAME]]") {{.*}} [[SUB_SOURCE_DATA_TYPE]]
|
||||
// CHECK-NEXT: %[[FIELD4:.+]] = firrtl.subfield %[[INSTANCE]]("[[SUB_SINK_VALID_NAME]]") {{.*}} [[SUB_SINK_VALID_TYPE]]
|
||||
// CHECK-NEXT: %[[FIELD5:.+]] = firrtl.subfield %[[INSTANCE]]("[[SUB_SINK_READY_NAME]]") {{.*}} [[SUB_SINK_READY_TYPE]]
|
||||
// CHECK-NEXT: %[[FIELD6:.+]] = firrtl.subfield %[[INSTANCE]]("[[SUB_SINK_DATA_NAME]]") {{.*}} [[SUB_SINK_DATA_TYPE]]
|
||||
|
||||
// CHECK-NEXT: firrtl.connect %[[FIELD1]], %[[SOURCE_VALID_NAME]] : !firrtl.[[SUB_SOURCE_VALID_TYPE]], [[SOURCE_VALID_TYPE]]
|
||||
// CHECK-NEXT: firrtl.connect %[[FIELD2]], %[[SOURCE_READY_NAME]] : !firrtl.[[SUB_SOURCE_READY_TYPE]], [[SOURCE_READY_TYPE]]
|
||||
// CHECK-NEXT: firrtl.connect %[[FIELD3]], %[[SOURCE_DATA_NAME]] : !firrtl.[[SUB_SOURCE_DATA_TYPE]], [[SOURCE_DATA_TYPE]]
|
||||
// CHECK-NEXT: firrtl.connect %[[SINK_VALID_NAME]], %[[FIELD4]] : [[SINK_VALID_TYPE]], !firrtl.[[SUB_SINK_VALID_TYPE]]
|
||||
// CHECK-NEXT: firrtl.connect %[[SINK_READY_NAME]], %[[FIELD5]] : [[SINK_READY_TYPE]], !firrtl.[[SUB_SINK_READY_TYPE]]
|
||||
// CHECK-NEXT: firrtl.connect %[[SINK_DATA_NAME]], %[[FIELD6]] : [[SINK_DATA_TYPE]], !firrtl.[[SUB_SINK_DATA_TYPE]]
|
||||
|
||||
%1 = firrtl.subfield %0("source") : (!firrtl.bundle<source: bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>, sink: bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>>) -> !firrtl.bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>
|
||||
firrtl.connect %1, %source : !firrtl.bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>, !firrtl.bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>
|
||||
|
||||
%2 = firrtl.subfield %0("sink") : (!firrtl.bundle<source: bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>, sink: bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>>) -> !firrtl.bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>
|
||||
firrtl.connect %sink, %2 : !firrtl.bundle<valid: flip<uint<1>>, ready: uint<1>, data: flip<uint<64>>>, !firrtl.bundle<valid: uint<1>, ready: flip<uint<1>>, data: uint<64>>
|
||||
}
|
||||
}
|
||||
|
|
@ -112,6 +112,8 @@ processBuffer(std::unique_ptr<llvm::MemoryBuffer> ownedBuffer,
|
|||
|
||||
// Run the lower-to-rtl pass if requested.
|
||||
if (lowerToRTL) {
|
||||
pm.nest<firrtl::CircuitOp>().nest<firrtl::FModuleOp>().addPass(
|
||||
firrtl::createLowerFIRRTLTypesPass());
|
||||
pm.addPass(firrtl::createLowerFIRRTLToRTLModulePass());
|
||||
pm.nest<rtl::RTLModuleOp>().addPass(firrtl::createLowerFIRRTLToRTLPass());
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue