mirror of https://github.com/llvm/circt.git
[Emit] Copy fragments into modules created by ExtractTestCode (#6843)
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@ -222,6 +222,8 @@ static hw::HWModuleOp createModuleForCut(hw::HWModuleOp op,
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b.getStringAttr(getVerilogModuleNameAttr(op).getValue() + suffix), ports);
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if (path)
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newMod->setAttr("output_file", path);
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if (auto fragments = op->getAttr("emit.fragments"))
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newMod->setAttr("emit.fragments", fragments);
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newMod.setCommentAttr(b.getStringAttr("VCS coverage exclude_file"));
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newMod.setPrivate();
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@ -1,13 +1,16 @@
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// RUN: circt-opt --sv-extract-test-code --split-input-file %s | FileCheck %s
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// CHECK-LABEL: module attributes {firrtl.extract.assert = #hw.output_file<"dir3{{/|\\\\}}"
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// CHECK-NEXT: sv.macro.decl @SYNTHESIS
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// CHECK-NEXT: emit.fragment @some_fragment {
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// CHECK-NEXT: sv.verbatim "foo"
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// CHECK-NEXT: }
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// CHECK-NEXT: hw.module.extern @foo_cover
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// CHECK-NOT: attributes
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// CHECK-NEXT: hw.module.extern @foo_assume
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// CHECK-NOT: attributes
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// CHECK-NEXT: hw.module.extern @foo_assert
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// CHECK-NOT: attributes
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// CHECK: hw.module private @issue1246_assert(in %clock : i1) attributes {comment = "VCS coverage exclude_file", output_file = #hw.output_file<"dir3{{/|\\\\}}", excludeFromFileList, includeReplicatedOps>}
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// CHECK: hw.module private @issue1246_assert(in %clock : i1) attributes {comment = "VCS coverage exclude_file", emit.fragments = [@some_fragment], output_file = #hw.output_file<"dir3{{/|\\\\}}", excludeFromFileList, includeReplicatedOps>}
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// CHECK: sv.assert
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// CHECK: sv.error "Assertion failed"
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// CHECK: sv.error "assert:"
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@ -15,12 +18,16 @@
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// CHECK: sv.error "check [verif-library-assert] is included"
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// CHECK: sv.fatal 1
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// CHECK: foo_assert
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// CHECK: hw.module private @issue1246_assume(in %clock : i1)
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// CHECK-SAME: attributes {comment = "VCS coverage exclude_file"}
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// CHECK: hw.module private @issue1246_assume(in %clock : i1) attributes {
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// CHECK-SAME: comment = "VCS coverage exclude_file"
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// CHECK-SAME: emit.fragments = [@some_fragment]
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// CEHCK-SAME: }
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// CHECK: sv.assume
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// CHECK: foo_assume
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// CHECK: hw.module private @issue1246_cover(in %clock : i1)
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// CHECK-SAME: attributes {comment = "VCS coverage exclude_file"}
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// CHECK: hw.module private @issue1246_cover(in %clock : i1) attributes {
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// CHECK-SAME: comment = "VCS coverage exclude_file"
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// CHECK-SAME: emit.fragments = [@some_fragment]
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// CEHCK-SAME: }
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// CHECK: sv.cover
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// CHECK: foo_cover
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// CHECK: hw.module @issue1246
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@ -35,10 +42,13 @@
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// CHECK: sv.bind <@issue1246::@__ETC_issue1246_cover>
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module attributes {firrtl.extract.assert = #hw.output_file<"dir3/", excludeFromFileList, includeReplicatedOps>, firrtl.extract.assume.bindfile = #hw.output_file<"file4", excludeFromFileList>} {
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sv.macro.decl @SYNTHESIS
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emit.fragment @some_fragment {
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sv.verbatim "foo"
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}
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hw.module.extern @foo_cover(in %a : i1) attributes {"firrtl.extract.cover.extra"}
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hw.module.extern @foo_assume(in %a : i1) attributes {"firrtl.extract.assume.extra"}
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hw.module.extern @foo_assert(in %a : i1) attributes {"firrtl.extract.assert.extra"}
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hw.module @issue1246(in %clock: i1) {
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hw.module @issue1246(in %clock: i1) attributes {emit.fragments = [@some_fragment]} {
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sv.always posedge %clock {
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sv.ifdef.procedural @SYNTHESIS {
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} else {
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