mirror of https://github.com/llvm/circt.git
Move ResetType under the sv namespace (#7300)
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@ -268,8 +268,9 @@ def SyncReset: I32EnumAttrCase<"SyncReset", 1, "syncreset">;
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def AsyncReset: I32EnumAttrCase<"AsyncReset", 2, "asyncreset">;
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def ResetTypeAttr : I32EnumAttr<"ResetType", "reset type",
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[NoReset, SyncReset, AsyncReset]>;
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[NoReset, SyncReset, AsyncReset]> {
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let cppNamespace = "::circt::sv";
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}
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def AlwaysFFOp : SVOp<"alwaysff", [SingleBlock, NoTerminator, NoRegionArguments,
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RecursiveMemoryEffects, RecursivelySpeculatable,
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@ -1467,11 +1467,11 @@ struct FIRRTLLowering : public FIRRTLVisitor<FIRRTLLowering, LogicalResult> {
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Value getNonClockValue(Value v);
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void addToAlwaysBlock(sv::EventControl clockEdge, Value clock,
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::ResetType resetStyle, sv::EventControl resetEdge,
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sv::ResetType resetStyle, sv::EventControl resetEdge,
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Value reset, std::function<void(void)> body = {},
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std::function<void(void)> resetBody = {});
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void addToAlwaysBlock(Value clock, std::function<void(void)> body = {}) {
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addToAlwaysBlock(sv::EventControl::AtPosEdge, clock, ::ResetType(),
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addToAlwaysBlock(sv::EventControl::AtPosEdge, clock, sv::ResetType(),
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sv::EventControl(), Value(), body,
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std::function<void(void)>());
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}
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@ -1736,7 +1736,7 @@ private:
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// We auto-unique graph-level blocks to reduce the amount of generated
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// code and ensure that side effects are properly ordered in FIRRTL.
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using AlwaysKeyType = std::tuple<Block *, sv::EventControl, Value,
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::ResetType, sv::EventControl, Value>;
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sv::ResetType, sv::EventControl, Value>;
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llvm::SmallDenseMap<AlwaysKeyType, std::pair<sv::AlwaysOp, sv::IfOp>>
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alwaysBlocks;
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llvm::SmallDenseMap<std::pair<Block *, Attribute>, sv::IfDefOp> ifdefBlocks;
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@ -2511,7 +2511,7 @@ Value FIRRTLLowering::getNonClockValue(Value v) {
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}
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void FIRRTLLowering::addToAlwaysBlock(sv::EventControl clockEdge, Value clock,
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::ResetType resetStyle,
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sv::ResetType resetStyle,
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sv::EventControl resetEdge, Value reset,
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std::function<void(void)> body,
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std::function<void(void)> resetBody) {
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@ -2523,7 +2523,7 @@ void FIRRTLLowering::addToAlwaysBlock(sv::EventControl clockEdge, Value clock,
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if (!alwaysOp) {
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if (reset) {
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assert(resetStyle != ::ResetType::NoReset);
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assert(resetStyle != sv::ResetType::NoReset);
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// Here, we want to create the folloing structure with sv.always and
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// sv.if. If `reset` is async, we need to add `reset` to a sensitivity
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// list.
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@ -2542,7 +2542,7 @@ void FIRRTLLowering::addToAlwaysBlock(sv::EventControl clockEdge, Value clock,
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insideIfOp = builder.create<sv::IfOp>(
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reset, []() {}, []() {});
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};
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if (resetStyle == ::ResetType::AsyncReset) {
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if (resetStyle == sv::ResetType::AsyncReset) {
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sv::EventControl events[] = {clockEdge, resetEdge};
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Value clocks[] = {clock, reset};
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@ -533,7 +533,7 @@ FirRegLowering::RegLowerInfo FirRegLowering::lower(FirRegOp reg) {
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else
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createTree(b, svReg.reg, reg, reg.getNext());
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},
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reg.getIsAsync() ? ResetType::AsyncReset : ResetType::SyncReset,
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reg.getIsAsync() ? sv::ResetType::AsyncReset : sv::ResetType::SyncReset,
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sv::EventControl::AtPosEdge, reg.getReset(),
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[&](OpBuilder &builder) {
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builder.create<sv::PAssignOp>(loc, svReg.reg, reg.getResetValue());
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@ -616,7 +616,7 @@ void FirRegLowering::initialize(OpBuilder &builder, RegLowerInfo reg,
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void FirRegLowering::addToAlwaysBlock(
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Block *block, sv::EventControl clockEdge, Value clock,
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const std::function<void(OpBuilder &)> &body, ::ResetType resetStyle,
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const std::function<void(OpBuilder &)> &body, sv::ResetType resetStyle,
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sv::EventControl resetEdge, Value reset,
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const std::function<void(OpBuilder &)> &resetBody) {
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auto loc = clock.getLoc();
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@ -632,7 +632,7 @@ void FirRegLowering::addToAlwaysBlock(
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if (!alwaysOp) {
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if (reset) {
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assert(resetStyle != ::ResetType::NoReset);
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assert(resetStyle != sv::ResetType::NoReset);
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// Here, we want to create the following structure with sv.always and
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// sv.if. If `reset` is async, we need to add `reset` to a sensitivity
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// list.
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@ -651,7 +651,7 @@ void FirRegLowering::addToAlwaysBlock(
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insideIfOp = builder.create<sv::IfOp>(
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reset, []() {}, []() {});
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};
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if (resetStyle == ::ResetType::AsyncReset) {
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if (resetStyle == sv::ResetType::AsyncReset) {
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sv::EventControl events[] = {clockEdge, resetEdge};
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Value clocks[] = {clock, reset};
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@ -107,7 +107,7 @@ private:
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void addToAlwaysBlock(Block *block, sv::EventControl clockEdge, Value clock,
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const std::function<void(OpBuilder &)> &body,
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ResetType resetStyle = {},
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sv::ResetType resetStyle = {},
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sv::EventControl resetEdge = {}, Value reset = {},
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const std::function<void(OpBuilder &)> &resetBody = {});
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@ -127,8 +127,8 @@ private:
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return constant;
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}
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using AlwaysKeyType = std::tuple<Block *, sv::EventControl, Value, ResetType,
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sv::EventControl, Value>;
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using AlwaysKeyType = std::tuple<Block *, sv::EventControl, Value,
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sv::ResetType, sv::EventControl, Value>;
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llvm::SmallDenseMap<AlwaysKeyType, std::pair<sv::AlwaysOp, sv::IfOp>>
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alwaysBlocks;
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@ -97,7 +97,7 @@ public:
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if (lowerToAlwaysFF) {
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rewriter.create<sv::AlwaysFFOp>(
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loc, sv::EventControl::AtPosEdge, adaptor.getClk(),
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ResetType::SyncReset, sv::EventControl::AtPosEdge,
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sv::ResetType::SyncReset, sv::EventControl::AtPosEdge,
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adaptor.getReset(), assignValue, assignReset);
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} else {
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rewriter.create<sv::AlwaysOp>(
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@ -278,7 +278,7 @@ instantiateSystemVerilogMemory(ServiceImplementReqOp implReq,
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// Now construct the memory writes.
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auto hwClk = b.create<seq::FromClockOp>(clk);
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b.create<sv::AlwaysFFOp>(
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sv::EventControl::AtPosEdge, hwClk, ResetType::SyncReset,
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sv::EventControl::AtPosEdge, hwClk, sv::ResetType::SyncReset,
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sv::EventControl::AtPosEdge, rst, [&] {
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for (auto [go, address, data] : writeGoAddressData) {
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Value a = address, d = data; // So the lambda can capture.
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@ -100,8 +100,8 @@ public:
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auto hwClk = rewriter.create<seq::FromClockOp>(clk.getLoc(), clk);
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rewriter.create<sv::AlwaysFFOp>(
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mem.getLoc(), sv::EventControl::AtPosEdge, hwClk, ResetType::SyncReset,
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sv::EventControl::AtPosEdge, rst, [&] {
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mem.getLoc(), sv::EventControl::AtPosEdge, hwClk,
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sv::ResetType::SyncReset, sv::EventControl::AtPosEdge, rst, [&] {
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for (auto [loc, address, data, en] : writeTuples) {
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Value a = address, d = data; // So the lambda can capture.
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Location l = loc;
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