mirror of https://github.com/llvm/circt.git
[Arc] Remove hw.wire once it is tapped (#6372)
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@ -70,12 +70,12 @@ struct AddTapsPass : public arc::impl::AddTapsBase<AddTapsPass> {
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// Add taps for HW wires.
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void tap(hw::WireOp wireOp) {
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if (!tapWires)
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return;
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if (auto name = wireOp.getName()) {
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if (auto name = wireOp.getName(); name && tapWires) {
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OpBuilder builder(wireOp);
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buildTap(builder, wireOp.getLoc(), wireOp, *name);
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}
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wireOp.getResult().replaceAllUsesWith(wireOp.getInput());
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wireOp->erase();
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}
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// Add taps for named values.
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@ -215,3 +215,19 @@ hw.module @NonTrivial(in %clock: !seq.clock, in %i0: i4, in %reset1: i1, in %res
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hw.output %foo, %bar : i4, i4
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}
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// CHECK-NEXT: }
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hw.module @ObserveWires(in %in1: i32, in %in2: i32, out out: i32) {
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%c-1_i32 = hw.constant -1 : i32
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%0 = comb.and %in1, %in2 : i32
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arc.tap %0 {name = "z"} : i32
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%1 = comb.xor %0, %c-1_i32 : i32
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hw.output %1 : i32
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}
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// CHECK: arc.define @[[ARC_NAME:[a-zA-Z0-9_]+]]
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// CHECK: [[V0:%.+]] = comb.and
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// CHECK: [[V1:%.+]] = comb.xor [[V0]], {{.*}} :
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// CHECK: arc.output [[V0]], [[V1]] :
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// CHECK: hw.module @ObserveWires
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// CHECK-DAG: [[RES:%.+]]:2 = arc.state @[[ARC_NAME]]({{.*}}) lat 0 :
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// CHECK-DAG: arc.tap [[RES]]#0 {name = "z"} : i32
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// CHECK: hw.output %0#1 : i32
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@ -30,8 +30,8 @@ hw.module @ObserveWires() {
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%y = sv.wire : !hw.inout<i4>
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// CHECK-NEXT: hw.constant
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// CHECK-NEXT: arc.tap %z {name = "z"} : i4
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// CHECK-NEXT: %z = hw.wire
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// CHECK-NEXT: arc.tap %c0_i4 {name = "z"} : i4
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// CHECK-NOT: hw.wire
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%c0_i4 = hw.constant 0 : i4
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%z = hw.wire %c0_i4 : i4
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