[FIRRTL] Fix fieldIDs in annotations and symbols when lowering signatures

include/circt/Dialect/FIRRTL/FIRRTLAnnotations.h

@@ -15,6 +15,7 @@
 
 #include "circt/Support/LLVM.h"
 #include "mlir/IR/BuiltinAttributes.h"
+#include "mlir/IR/BuiltinTypes.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/PointerLikeTypeTraits.h"
 
@@ -53,6 +54,17 @@ public:
     assert(attr && "null attributes not allowed");
   }
 
+  // Make a new annotation which is a clone of anno with a new fieldID.
+  Annotation(Annotation anno, uint64_t fieldID) : attr(anno.attr) {
+    auto oldFieldID = anno.getMember<IntegerAttr>("circt.fieldID");
+    if (oldFieldID && !fieldID) {
+      removeMember("circt.fieldID");
+      return;
+    }
+    if (fieldID)
+      setMember("circt.fieldID", IntegerAttr::get(IntegerType::get(anno.attr.getContext(), 32), APInt(32, fieldID)));
+  }
+
   /// Get the data dictionary of this attribute.
   DictionaryAttr getDict() const;
 

lib/Dialect/FIRRTL/Transforms/EmitOMIR.cpp

@@ -1292,6 +1292,9 @@ void EmitOMIRPass::addFieldID(FIRRTLType type, unsigned fieldID,
           fieldID -= bundle.getFieldID(index);
           result.push_back('.');
           result.append(name.begin(), name.end());
+        })
+        .Default([](auto val) {
+          llvm::report_fatal_error("invalid fieldID");
         });
 }
 

lib/Dialect/FIRRTL/Transforms/LowerSignatures.cpp

@@ -118,6 +118,8 @@ symbolsForFieldIDRange(MLIRContext *ctx,
   SmallVector<hw::InnerSymPropertiesAttr, 4> newSyms(b, e);
   if (newSyms.empty())
     return {};
+  for (auto& sym : newSyms)
+    sym = hw::InnerSymPropertiesAttr::get(ctx, sym.getName(), sym.getFieldID() - low, sym.getSymVisibility());
   return hw::InnerSymAttr::get(ctx, newSyms);
 }
 
@@ -128,7 +130,7 @@ annosForFieldIDRange(MLIRContext *ctx,
   AnnotationSet newAnnos(ctx);
   auto [b, e] = annos.find(low, high);
   for (; b != e; ++b)
-    newAnnos.addAnnotations(*b);
+    newAnnos.addAnnotations(Annotation(*b, b->getFieldID() - low));
   return newAnnos;
 }
 

test/Dialect/FIRRTL/lower-signatures.mlir

@@ -8,8 +8,18 @@ firrtl.circuit "Prop" {
     firrtl.propassign %y, %0 : !firrtl.string
   }
 
-  firrtl.module @emptyVec(in %vi : !firrtl.vector<uint<4>, 0>, out %vo : !firrtl.vector<uint<4>, 0>) {
+  firrtl.module private @emptyVec(in %vi : !firrtl.vector<uint<4>, 0>, out %vo : !firrtl.vector<uint<4>, 0>) attributes {convention = #firrtl<convention scalarized>} {
     firrtl.strictconnect %vo, %vi : !firrtl.vector<uint<4>, 0>
   }
 
+  // CHECK-LABEL: @Annos
+  // CHECK-SAME: in %x: !firrtl.uint<1> [{class = "circt.test", pin = "pin0"}],
+  // CHECK-SAME: in %y_a: !firrtl.uint<1> [{class = "circt.test", pin = "pin1"}],
+  // CHECK-SAME: in %y_b: !firrtl.uint<2> [{class = "circt.test", pin = "pin2"}])
+  firrtl.module private @Annos(
+    in %x: !firrtl.uint<1> [{circt.fieldID = 0 : i64, class = "circt.test", pin = "pin0"}],
+    in %y: !firrtl.bundle<a: uint<1>, b: uint<2>> [{circt.fieldID = 2 : i64, class = "circt.test", pin = "pin2"}, {circt.fieldID = 1 : i64, class = "circt.test", pin = "pin1"}]
+  )  attributes {convention = #firrtl<convention scalarized>} { 
+  }
+
 }