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[SVTestExtractCode][LowerToHW] Add coverage exclusion flag to testbench (#3183) 

This adds "// VCS coverage exclude_file" comment to modules under testbench to
make coverage accurate. The comment is added to extracted modules at ETC and
modules under testbench (ref #3058).
This commit is contained in:
Hideto Ueno 2022-05-27 11:37:30 +09:00 committed by GitHub
parent 667e266a91
commit 2d2f992756
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 7 additions and 3 deletions
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1
lib/Conversion/FIRRTLToHW/LowerToHW.cpp
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@ -1059,6 +1059,7 @@ FIRRTLModuleLowering::lowerModule(FModuleOp oldModule, Block *topLevelModule,
newModule->setAttr("output_file", testBenchDir);
newModule->setAttr("firrtl.extract.do_not_extract",
builder.getUnitAttr());
newModule.commentAttr(builder.getStringAttr("VCS coverage exclude_file"));
}
bool failed = false;

1
lib/Dialect/SV/Transforms/SVExtractTestCode.cpp
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@ -166,6 +166,7 @@ static hw::HWModuleOp createModuleForCut(hw::HWModuleOp op,
b.getStringAttr(getVerilogModuleNameAttr(op).getValue() + suffix), ports);
if (path)
newMod->setAttr("output_file", path);
newMod.commentAttr(b.getStringAttr("VCS coverage exclude_file"));
// Update the mapping from old values to cloned values
for (auto port : llvm::enumerate(inputs))

2
test/Conversion/FIRRTLToHW/module-hierarchy-file.mlir
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@ -65,10 +65,12 @@ firrtl.circuit "MyTestHarness" attributes {annotations = [ {class = "sifive.ente
{class = "sifive.enterprise.firrtl.MarkDUTAnnotation"}]} {}
// CHECK-LABEL: hw.module private @Testbench
// CHECK-SAME: comment = "VCS coverage exclude_file"
// CHECK-SAME: firrtl.extract.do_not_extract
firrtl.module private @Testbench() {}
// CHECK-LABEL: hw.module @MyTestHarness
// CHECK-SAME: comment = "VCS coverage exclude_file"
// CHECK-SAME: firrtl.extract.do_not_extract
firrtl.module @MyTestHarness() {
firrtl.instance myDUT @MyDUT()

6
test/Dialect/SV/hw-extract-test-code.mlir
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@ -6,7 +6,7 @@
// CHECK-NOT: attributes
// CHECK-NEXT: hw.module.extern @foo_assert
// CHECK-NOT: attributes
// CHECK: hw.module @issue1246_assert(%clock: i1) attributes {output_file = #hw.output_file<"dir3/", excludeFromFileList, includeReplicatedOps>}
// CHECK: hw.module @issue1246_assert(%clock: i1) attributes {comment = "VCS coverage exclude_file", output_file = #hw.output_file<"dir3/", excludeFromFileList, includeReplicatedOps>}
// CHECK: sv.assert
// CHECK: sv.error "Assertion failed"
// CHECK: sv.error "assert:"
@ -15,11 +15,11 @@
// CHECK: sv.fatal 1
// CHECK: foo_assert
// CHECK: hw.module @issue1246_assume(%clock: i1)
// CHECK-NOT: attributes
// CHECK-SAME: attributes {comment = "VCS coverage exclude_file"}
// CHECK: sv.assume
// CHECK: foo_assume
// CHECK: hw.module @issue1246_cover(%clock: i1)
// CHECK-NOT: attributes
// CHECK-SAME: attributes {comment = "VCS coverage exclude_file"}
// CHECK: sv.cover
// CHECK: foo_cover
// CHECK: hw.module @issue1246