diff --git a/test/firtool/combinational-loops.fir b/test/firtool/combinational-loops.fir new file mode 100644 index 0000000000..841b0d2871 --- /dev/null +++ b/test/firtool/combinational-loops.fir @@ -0,0 +1,12 @@ +; RUN: firtool %s -split-input-file -verify-diagnostics + +; Check that we resolve last connect semantics before detecting combinational +; loops. +FIRRTL version 4.0.0 +circuit CombinationalLoop: + public module CombinationalLoop: + output o : UInt<1> + wire w : UInt<1> + connect w, w + connect w, UInt<1>(0) + connect o, w