mirror of https://github.com/llvm/circt.git
[ESI][Runtime] Filling out the type system (#6476)
Implementing missing classes and exposing to Python. Will build to proper type-based serialization in Python.
This commit is contained in:
John Demme
GitHub
parent
a0ea4b4b4f
commit
25b69dc4f4
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@ -11,6 +11,10 @@
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!sendI0 = !esi.bundle<[!esi.channel<i0> to "send"]>
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!recvI0 = !esi.bundle<[!esi.channel<i0> to "recv"]>
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!anyFrom = !esi.bundle<[
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!esi.channel<!esi.any> from "recv",
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!esi.channel<!esi.any> to "send"]>
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esi.service.decl @HostComms {
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esi.service.to_server @Send : !sendI8
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esi.service.to_client @Recv : !recvI8
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@ -33,6 +37,22 @@ hw.module @Loopback (in %clk: !seq.clock) {
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esi.service.req.to_server %sendi0_bundle -> <@MyService::@Send> (#esi.appid<"mysvc_send">) : !sendI0
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}
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esi.service.std.func @funcs
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!structFunc = !esi.bundle<[
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!esi.channel<!hw.struct<a: ui4, b: si8>> to "arg",
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!esi.channel<!hw.array<1xsi8>> from "result"]>
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hw.module @LoopbackStruct() {
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%callBundle = esi.service.req.to_client <@funcs::@call> (#esi.appid<"structFunc">) : !structFunc
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%arg = esi.bundle.unpack %resultChan from %callBundle : !structFunc
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%argData, %valid = esi.unwrap.vr %arg, %ready : !hw.struct<a: ui4, b: si8>
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%resultElem = hw.struct_extract %argData["b"] : !hw.struct<a: ui4, b: si8>
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%resultArray = hw.array_create %resultElem : si8
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%resultChan, %ready = esi.wrap.vr %resultArray, %valid : !hw.array<1xsi8>
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}
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esi.mem.ram @MemA i64 x 20
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!write = !hw.struct<address: i5, data: i64>
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!writeBundle = !esi.bundle<[!esi.channel<!write> to "req", !esi.channel<i0> from "ack"]>
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@ -46,8 +66,6 @@ hw.module @MemoryAccess1(in %clk : !seq.clock, in %rst : i1) {
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esi.service.req.to_server %writeBundle -> <@MemA::@write> (#esi.appid<"internal_write">) : !writeBundle
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}
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esi.service.std.func @funcs
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!func1Signature = !esi.bundle<[!esi.channel<i16> to "arg", !esi.channel<i16> from "result"]>
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hw.module @CallableFunc1() {
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%call = esi.service.req.to_client <@funcs::@call> (#esi.appid<"func1">) : !func1Signature
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@ -63,4 +81,5 @@ hw.module @top(in %clk: !seq.clock, in %rst: i1) {
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hw.instance "m2" @Loopback (clk: %clk: !seq.clock) -> () {esi.appid=#esi.appid<"loopback_inst"[1]>}
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hw.instance "int_mem" @MemoryAccess1 (clk: %clk: !seq.clock, rst: %rst: i1) -> ()
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hw.instance "func1" @CallableFunc1() -> ()
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hw.instance "loopback_struct" @LoopbackStruct() -> ()
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}
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@ -8,7 +8,33 @@ acc = esi.Accelerator(platform, sys.argv[2])
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assert acc.sysinfo().esi_version() == 1
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m = acc.manifest()
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assert m.api_version == 1
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print(m.type_table)
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def strType(t: esi.Type) -> str:
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if isinstance(t, esi.BundleType):
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return "bundle<[{}]>".format(", ".join([
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f"{name} {direction} {strType(ty)}" for (name, direction,
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ty) in t.channels
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]))
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if isinstance(t, esi.ChannelType):
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return f"channel<{strType(t.inner)}>"
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if isinstance(t, esi.ArrayType):
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return f"array<{strType(t.element)}, {t.size}>"
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if isinstance(t, esi.StructType):
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return "struct<{}>".format(", ".join(
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["{name}: {strType(ty)}" for (name, ty) in t.fields]))
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if isinstance(t, esi.BitsType):
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return f"bits<{t.width}>"
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if isinstance(t, esi.UIntType):
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return f"uint<{t.width}>"
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if isinstance(t, esi.SIntType):
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return f"sint<{t.width}>"
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assert False, f"unknown type: {t}"
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for esiType in m.type_table:
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print(f"{esiType}:")
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print(f" {strType(esiType)}")
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d = m.build_design(acc)
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@ -21,6 +47,7 @@ assert appid.idx == 0
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mysvc_send = loopback.ports[esi.AppID("mysvc_recv")].channels["recv"]
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mysvc_send.connect()
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mysvc_send.write([0])
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assert str(mysvc_send.type) == "<!esi.channel<i0>>"
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mysvc_send = loopback.ports[esi.AppID("mysvc_send")].channels["send"]
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mysvc_send.connect()
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@ -47,14 +47,23 @@ constexpr uint32_t ExpectedVersionNumber = 0;
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/// but used by higher level APIs which add types.
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class ChannelPort {
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public:
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ChannelPort(const Type &type) : type(type) {}
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virtual ~ChannelPort() = default;
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virtual void connect() {}
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virtual void disconnect() {}
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const Type &getType() const { return type; }
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private:
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const Type &type;
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};
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/// A ChannelPort which sends data to the accelerator.
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class WriteChannelPort : public ChannelPort {
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public:
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using ChannelPort::ChannelPort;
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/// A very basic write API. Will likely change for performance reasons.
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virtual void write(const void *data, size_t size) = 0;
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};
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@ -62,6 +71,8 @@ public:
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/// A ChannelPort which reads data from the accelerator.
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class ReadChannelPort : public ChannelPort {
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public:
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using ChannelPort::ChannelPort;
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/// Specify a buffer to read into and a maximum size to read. Returns the
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/// number of bytes read, or -1 on error. Basic API, will likely change for
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/// performance reasons.
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@ -61,6 +61,91 @@ protected:
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ChannelVector channels;
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};
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/// Channels are the basic communication primitives. They are unidirectional and
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/// carry one values of one type.
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class ChannelType : public Type {
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public:
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ChannelType(const ID &id, const Type &inner) : Type(id), inner(inner) {}
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const Type &getInner() const { return inner; }
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private:
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const Type &inner;
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};
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/// The "any" type is a special type which can be used to represent any type, as
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/// identified by the type id. Said type id is guaranteed to be present in the
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/// manifest. Importantly, the "any" type id over the wire may not be a string
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/// as it is in software.
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class AnyType : public Type {
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public:
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AnyType(const ID &id) : Type(id) {}
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};
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/// Bit vectors include signed, unsigned, and signless integers.
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class BitVectorType : public Type {
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public:
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BitVectorType(const ID &id, uint64_t width) : Type(id), width(width) {}
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uint64_t getWidth() const { return width; }
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private:
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uint64_t width;
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};
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/// Bits are just an array of bits. They are not interpreted as a number but are
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/// identified in the manifest as "signless" ints.
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class BitsType : public BitVectorType {
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public:
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using BitVectorType::BitVectorType;
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};
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/// Integers are bit vectors which may be signed or unsigned and are interpreted
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/// as numbers.
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class IntegerType : public BitVectorType {
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public:
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using BitVectorType::BitVectorType;
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};
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/// Signed integer.
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class SIntType : public IntegerType {
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public:
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using IntegerType::IntegerType;
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};
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/// Unsigned integer.
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class UIntType : public IntegerType {
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public:
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using IntegerType::IntegerType;
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};
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/// Structs are an ordered collection of fields, each with a name and a type.
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class StructType : public Type {
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public:
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using FieldVector = std::vector<std::tuple<std::string, const Type &>>;
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StructType(const ID &id, const FieldVector &fields)
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: Type(id), fields(fields) {}
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const FieldVector &getFields() const { return fields; }
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private:
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FieldVector fields;
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};
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/// Arrays have a compile time specified (static) size and an element type.
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class ArrayType : public Type {
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public:
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ArrayType(const ID &id, const Type &elementType, uint64_t size)
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: Type(id), elementType(elementType), size(size) {}
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const Type &getElementType() const { return elementType; }
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uint64_t getSize() const { return size; }
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private:
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const Type &elementType;
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uint64_t size;
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};
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} // namespace esi
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#endif // ESI_TYPES_H
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@ -39,6 +39,8 @@ class Manifest::Impl {
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friend class ::esi::Manifest;
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public:
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using TypeCache = map<Type::ID, unique_ptr<Type>>;
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Impl(const string &jsonManifest);
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auto at(const string &key) const { return manifestJson.at(key); }
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@ -99,10 +101,8 @@ public:
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const Type &parseType(const nlohmann::json &typeJson);
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private:
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BundleType *parseBundleType(const nlohmann::json &typeJson);
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vector<reference_wrapper<const Type>> _typeTable;
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map<Type::ID, unique_ptr<Type>> _types;
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TypeCache _types;
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// The parsed json.
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nlohmann::json manifestJson;
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@ -190,7 +190,7 @@ static ModuleInfo parseModuleInfo(const nlohmann::json &mod) {
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}
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//===----------------------------------------------------------------------===//
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// ManifestProxy class implementation.
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// Manifest::Impl class implementation.
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//===----------------------------------------------------------------------===//
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Manifest::Impl::Impl(const string &manifestStr) {
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@ -381,7 +381,12 @@ Manifest::Impl::getBundlePorts(AppIDPath idPath,
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return ret;
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}
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BundleType *Manifest::Impl::parseBundleType(const nlohmann::json &typeJson) {
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namespace {
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const Type &parseType(const nlohmann::json &typeJson,
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Manifest::Impl::TypeCache &cache);
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BundleType *parseBundleType(const nlohmann::json &typeJson,
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Manifest::Impl::TypeCache &cache) {
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assert(typeJson.at("mnemonic") == "bundle");
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vector<tuple<string, BundleType::Direction, const Type &>> channels;
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@ -396,34 +401,98 @@ BundleType *Manifest::Impl::parseBundleType(const nlohmann::json &typeJson) {
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throw runtime_error("Malformed manifest: unknown direction '" + dirStr +
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"'");
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channels.emplace_back(chanJson.at("name"), dir,
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parseType(chanJson["type"]));
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parseType(chanJson["type"], cache));
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}
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return new BundleType(typeJson.at("circt_name"), channels);
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}
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ChannelType *parseChannelType(const nlohmann::json &typeJson,
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Manifest::Impl::TypeCache &cache) {
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assert(typeJson.at("mnemonic") == "channel");
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return new ChannelType(typeJson.at("circt_name"),
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parseType(typeJson.at("inner"), cache));
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}
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BitVectorType *parseInt(const nlohmann::json &typeJson,
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Manifest::Impl::TypeCache &cache) {
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assert(typeJson.at("mnemonic") == "int");
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std::string sign = typeJson.at("signedness");
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uint64_t width = typeJson.at("hw_bitwidth");
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Type::ID id = typeJson.at("circt_name");
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if (sign == "signed")
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return new SIntType(id, width);
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else if (sign == "unsigned")
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return new UIntType(id, width);
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else if (sign == "signless")
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return new BitsType(id, width);
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else
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throw runtime_error("Malformed manifest: unknown sign '" + sign + "'");
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}
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StructType *parseStruct(const nlohmann::json &typeJson,
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Manifest::Impl::TypeCache &cache) {
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assert(typeJson.at("mnemonic") == "struct");
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vector<tuple<string, const Type &>> fields;
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for (auto &fieldJson : typeJson["fields"])
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fields.emplace_back(fieldJson.at("name"),
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parseType(fieldJson["type"], cache));
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return new StructType(typeJson.at("circt_name"), fields);
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}
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ArrayType *parseArray(const nlohmann::json &typeJson,
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Manifest::Impl::TypeCache &cache) {
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assert(typeJson.at("mnemonic") == "array");
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uint64_t size = typeJson.at("size");
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return new ArrayType(typeJson.at("circt_name"),
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parseType(typeJson.at("element"), cache), size);
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}
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using TypeParser =
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std::function<Type *(const nlohmann::json &, Manifest::Impl::TypeCache &)>;
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const std::map<std::string_view, TypeParser> typeParsers = {
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{"bundle", parseBundleType},
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{"channel", parseChannelType},
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{"any",
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[](const nlohmann::json &typeJson, Manifest::Impl::TypeCache &cache) {
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return new AnyType(typeJson.at("circt_name"));
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}},
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{"int", parseInt},
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{"struct", parseStruct},
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{"array", parseArray},
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};
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// Parse a type if it doesn't already exist in the cache.
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const Type &Manifest::Impl::parseType(const nlohmann::json &typeJson) {
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const Type &parseType(const nlohmann::json &typeJson,
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Manifest::Impl::TypeCache &cache) {
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// We use the circt type string as a unique ID.
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string circt_name = typeJson.at("circt_name");
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// Check the cache.
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auto typeF = _types.find(circt_name);
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if (typeF != _types.end())
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auto typeF = cache.find(circt_name);
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if (typeF != cache.end())
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return *typeF->second;
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// Parse the type.
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string mnemonic = typeJson.at("mnemonic");
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Type *t;
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if (mnemonic == "bundle")
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t = parseBundleType(typeJson);
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auto f = typeParsers.find(mnemonic);
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if (f != typeParsers.end())
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t = f->second(typeJson, cache);
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else
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// Types we don't know about are opaque.
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t = new Type(circt_name);
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// Insert into the cache.
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_types.emplace(circt_name, unique_ptr<Type>(t));
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cache.emplace(circt_name, unique_ptr<Type>(t));
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return *t;
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}
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} // namespace
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const Type &Manifest::Impl::parseType(const nlohmann::json &typeJson) {
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return ::parseType(typeJson, _types);
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}
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void Manifest::Impl::populateTypes(const nlohmann::json &typesJson) {
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for (auto &typeJson : typesJson)
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@ -222,8 +222,10 @@ void CosimChannelPort::disconnect() {
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namespace {
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class WriteCosimChannelPort : public WriteChannelPort {
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public:
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WriteCosimChannelPort(CosimAccelerator::Impl &impl, string name)
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: cosim(make_unique<CosimChannelPort>(impl, name)) {}
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WriteCosimChannelPort(CosimAccelerator::Impl &impl, const Type &type,
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string name)
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: WriteChannelPort(type),
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cosim(make_unique<CosimChannelPort>(impl, name)) {}
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virtual ~WriteCosimChannelPort() = default;
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@ -243,8 +245,9 @@ void WriteCosimChannelPort::write(const void *data, size_t size) {
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namespace {
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class ReadCosimChannelPort : public ReadChannelPort {
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public:
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ReadCosimChannelPort(CosimAccelerator::Impl &impl, string name)
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: cosim(new CosimChannelPort(impl, name)) {}
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ReadCosimChannelPort(CosimAccelerator::Impl &impl, const Type &type,
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string name)
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: ReadChannelPort(type), cosim(new CosimChannelPort(impl, name)) {}
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virtual ~ReadCosimChannelPort() = default;
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@ -310,9 +313,9 @@ public:
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ChannelPort *port;
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if (BundlePort::isWrite(dir, svcDir))
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port = new WriteCosimChannelPort(impl, channelName);
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port = new WriteCosimChannelPort(impl, type, channelName);
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else
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port = new ReadCosimChannelPort(impl, channelName);
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port = new ReadCosimChannelPort(impl, type, channelName);
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impl.channels.emplace(port);
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channels.emplace(name, *port);
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}
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@ -155,9 +155,9 @@ private:
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namespace {
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class WriteTraceChannelPort : public WriteChannelPort {
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public:
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WriteTraceChannelPort(TraceAccelerator::Impl &impl, const AppIDPath &id,
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const string &portName)
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: impl(impl), id(id), portName(portName) {}
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WriteTraceChannelPort(TraceAccelerator::Impl &impl, const Type &type,
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const AppIDPath &id, const string &portName)
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: WriteChannelPort(type), impl(impl), id(id), portName(portName) {}
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virtual void write(const void *data, size_t size) override {
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impl.write(id, portName, data, size);
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@ -173,7 +173,8 @@ protected:
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namespace {
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class ReadTraceChannelPort : public ReadChannelPort {
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public:
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ReadTraceChannelPort(TraceAccelerator::Impl &impl) {}
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ReadTraceChannelPort(TraceAccelerator::Impl &impl, const Type &type)
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: ReadChannelPort(type) {}
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virtual ssize_t read(void *data, size_t maxSize) override;
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};
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@ -201,9 +202,9 @@ public:
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for (auto [name, dir, type] : bundleType.getChannels()) {
|
||||
ChannelPort *port;
|
||||
if (BundlePort::isWrite(dir, svcDir))
|
||||
port = new WriteTraceChannelPort(impl, idPath, name);
|
||||
port = new WriteTraceChannelPort(impl, type, idPath, name);
|
||||
else
|
||||
port = new ReadTraceChannelPort(impl);
|
||||
port = new ReadTraceChannelPort(impl, type);
|
||||
channels.emplace(name, *port);
|
||||
impl.adoptChannelPort(port);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,4 +4,10 @@
|
|||
|
||||
from .accelerator import Accelerator
|
||||
|
||||
from .esiCppAccel import AppID
|
||||
from .esiCppAccel import (AppID, Type, BundleType, ChannelType, ArrayType,
|
||||
StructType, BitsType, UIntType, SIntType)
|
||||
|
||||
__all__ = [
|
||||
"Accelerator", "AppID", "Type", "BundleType", "ChannelType", "ArrayType",
|
||||
"StructType", "BitsType", "UIntType", "SIntType"
|
||||
]
|
||||
|
|
|
|||
|
|
@ -45,6 +45,34 @@ struct polymorphic_type_hook<ChannelPort> {
|
|||
|
||||
// NOLINTNEXTLINE(readability-identifier-naming)
|
||||
PYBIND11_MODULE(esiCppAccel, m) {
|
||||
py::class_<Type>(m, "Type")
|
||||
.def_property_readonly("id", &Type::getID)
|
||||
.def("__repr__", [](Type &t) { return "<" + t.getID() + ">"; });
|
||||
py::class_<ChannelType, Type>(m, "ChannelType")
|
||||
.def_property_readonly("inner", &ChannelType::getInner,
|
||||
py::return_value_policy::reference_internal);
|
||||
py::enum_<BundleType::Direction>(m, "Direction")
|
||||
.value("To", BundleType::Direction::To)
|
||||
.value("From", BundleType::Direction::From)
|
||||
.export_values();
|
||||
py::class_<BundleType, Type>(m, "BundleType")
|
||||
.def_property_readonly("channels", &BundleType::getChannels,
|
||||
py::return_value_policy::reference_internal);
|
||||
py::class_<AnyType, Type>(m, "AnyType");
|
||||
py::class_<BitVectorType, Type>(m, "BitVectorType")
|
||||
.def_property_readonly("width", &BitVectorType::getWidth);
|
||||
py::class_<BitsType, BitVectorType>(m, "BitsType");
|
||||
py::class_<IntegerType, BitVectorType>(m, "IntegerType");
|
||||
py::class_<SIntType, IntegerType>(m, "SIntType");
|
||||
py::class_<UIntType, IntegerType>(m, "UIntType");
|
||||
py::class_<StructType, Type>(m, "StructType")
|
||||
.def_property_readonly("fields", &StructType::getFields,
|
||||
py::return_value_policy::reference_internal);
|
||||
py::class_<ArrayType, Type>(m, "ArrayType")
|
||||
.def_property_readonly("element", &ArrayType::getElementType,
|
||||
py::return_value_policy::reference_internal)
|
||||
.def_property_readonly("size", &ArrayType::getSize);
|
||||
|
||||
py::class_<ModuleInfo>(m, "ModuleInfo")
|
||||
.def_property_readonly("name", [](ModuleInfo &info) { return info.name; })
|
||||
.def_property_readonly("summary",
|
||||
|
|
@ -96,7 +124,9 @@ PYBIND11_MODULE(esiCppAccel, m) {
|
|||
});
|
||||
|
||||
py::class_<ChannelPort>(m, "ChannelPort")
|
||||
.def("connect", &ChannelPort::connect);
|
||||
.def("connect", &ChannelPort::connect)
|
||||
.def_property_readonly("type", &ChannelPort::getType,
|
||||
py::return_value_policy::reference_internal);
|
||||
|
||||
py::class_<WriteChannelPort, ChannelPort>(m, "WriteChannelPort")
|
||||
.def("write", [](WriteChannelPort &p, std::vector<uint8_t> data) {
|
||||
|
|
@ -151,10 +181,6 @@ PYBIND11_MODULE(esiCppAccel, m) {
|
|||
[](Accelerator &acc) { return acc.getService<services::MMIO>({}); },
|
||||
py::return_value_policy::reference_internal);
|
||||
|
||||
py::class_<Type>(m, "Type")
|
||||
.def_property_readonly("id", &Type::getID)
|
||||
.def("__repr__", [](Type &t) { return "<" + t.getID() + ">"; });
|
||||
|
||||
py::class_<Manifest>(m, "Manifest")
|
||||
.def(py::init<std::string>())
|
||||
.def_property_readonly("api_version", &Manifest::getApiVersion)
|
||||
|
|
|
|||
|
|
@ -7,9 +7,11 @@ from __future__ import annotations
|
|||
import typing
|
||||
|
||||
__all__ = [
|
||||
'Accelerator', 'AppID', 'BundlePort', 'ChannelPort', 'Design', 'Instance',
|
||||
'MMIO', 'Manifest', 'ModuleInfo', 'ReadChannelPort', 'SysInfo', 'Type',
|
||||
'WriteChannelPort'
|
||||
'Accelerator', 'AnyType', 'AppID', 'ArrayType', 'BitVectorType', 'BitsType',
|
||||
'BundlePort', 'BundleType', 'ChannelPort', 'ChannelType', 'Design',
|
||||
'Direction', 'From', 'Instance', 'IntegerType', 'MMIO', 'Manifest',
|
||||
'ModuleInfo', 'ReadChannelPort', 'SIntType', 'StructType', 'SysInfo', 'To',
|
||||
'Type', 'UIntType', 'WriteChannelPort'
|
||||
]
|
||||
|
||||
|
||||
|
|
@ -25,6 +27,10 @@ class Accelerator:
|
|||
...
|
||||
|
||||
|
||||
class AnyType(Type):
|
||||
pass
|
||||
|
||||
|
||||
class AppID:
|
||||
|
||||
def __eq__(self, arg0: AppID) -> bool:
|
||||
|
|
@ -48,6 +54,28 @@ class AppID:
|
|||
...
|
||||
|
||||
|
||||
class ArrayType(Type):
|
||||
|
||||
@property
|
||||
def element(self) -> Type:
|
||||
...
|
||||
|
||||
@property
|
||||
def size(self) -> int:
|
||||
...
|
||||
|
||||
|
||||
class BitVectorType(Type):
|
||||
|
||||
@property
|
||||
def width(self) -> int:
|
||||
...
|
||||
|
||||
|
||||
class BitsType(BitVectorType):
|
||||
pass
|
||||
|
||||
|
||||
class BundlePort:
|
||||
|
||||
def getRead(self, arg0: str) -> ReadChannelPort:
|
||||
|
|
@ -65,11 +93,29 @@ class BundlePort:
|
|||
...
|
||||
|
||||
|
||||
class BundleType(Type):
|
||||
|
||||
@property
|
||||
def channels(self) -> list[tuple[str, Direction, Type]]:
|
||||
...
|
||||
|
||||
|
||||
class ChannelPort:
|
||||
|
||||
def connect(self) -> None:
|
||||
...
|
||||
|
||||
@property
|
||||
def type(self) -> Type:
|
||||
...
|
||||
|
||||
|
||||
class ChannelType(Type):
|
||||
|
||||
@property
|
||||
def inner(self) -> Type:
|
||||
...
|
||||
|
||||
|
||||
class Design:
|
||||
|
||||
|
|
@ -86,6 +132,59 @@ class Design:
|
|||
...
|
||||
|
||||
|
||||
class Direction:
|
||||
"""
|
||||
Members:
|
||||
|
||||
To
|
||||
|
||||
From
|
||||
"""
|
||||
From: typing.ClassVar[Direction] # value = <Direction.From: 1>
|
||||
To: typing.ClassVar[Direction] # value = <Direction.To: 0>
|
||||
__members__: typing.ClassVar[dict[
|
||||
str,
|
||||
Direction]] # value = {'To': <Direction.To: 0>, 'From': <Direction.From: 1>}
|
||||
|
||||
def __eq__(self, other: typing.Any) -> bool:
|
||||
...
|
||||
|
||||
def __getstate__(self) -> int:
|
||||
...
|
||||
|
||||
def __hash__(self) -> int:
|
||||
...
|
||||
|
||||
def __index__(self) -> int:
|
||||
...
|
||||
|
||||
def __init__(self, value: int) -> None:
|
||||
...
|
||||
|
||||
def __int__(self) -> int:
|
||||
...
|
||||
|
||||
def __ne__(self, other: typing.Any) -> bool:
|
||||
...
|
||||
|
||||
def __repr__(self) -> str:
|
||||
...
|
||||
|
||||
def __setstate__(self, state: int) -> None:
|
||||
...
|
||||
|
||||
def __str__(self) -> str:
|
||||
...
|
||||
|
||||
@property
|
||||
def name(self) -> str:
|
||||
...
|
||||
|
||||
@property
|
||||
def value(self) -> int:
|
||||
...
|
||||
|
||||
|
||||
class Instance(Design):
|
||||
|
||||
@property
|
||||
|
|
@ -93,6 +192,10 @@ class Instance(Design):
|
|||
...
|
||||
|
||||
|
||||
class IntegerType(BitVectorType):
|
||||
pass
|
||||
|
||||
|
||||
class MMIO:
|
||||
|
||||
def read(self, arg0: int) -> int:
|
||||
|
|
@ -151,6 +254,17 @@ class ReadChannelPort(ChannelPort):
|
|||
...
|
||||
|
||||
|
||||
class SIntType(IntegerType):
|
||||
pass
|
||||
|
||||
|
||||
class StructType(Type):
|
||||
|
||||
@property
|
||||
def fields(self) -> list[tuple[str, Type]]:
|
||||
...
|
||||
|
||||
|
||||
class SysInfo:
|
||||
|
||||
def esi_version(self) -> int:
|
||||
|
|
@ -170,7 +284,15 @@ class Type:
|
|||
...
|
||||
|
||||
|
||||
class UIntType(IntegerType):
|
||||
pass
|
||||
|
||||
|
||||
class WriteChannelPort(ChannelPort):
|
||||
|
||||
def write(self, arg0: list[int]) -> None:
|
||||
...
|
||||
|
||||
|
||||
From: Direction # value = <Direction.From: 1>
|
||||
To: Direction # value = <Direction.To: 0>
|
||||
|
|
|
|||
Loading…
Reference in New Issue