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[ETC] Use name/namehint as a port name (#5464) 

Fix #5459. Use namehints and name attributes on module boundary as port names of extracted modules. Also improve instance op logic a bit to avoid unnecessary linear search.
This commit is contained in:
Hideto Ueno 2023-06-23 18:53:25 +09:00 committed by GitHub
parent ff159a901c
commit 24cf2f22e9
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2 changed files with 15 additions and 11 deletions
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25
lib/Dialect/SV/Transforms/SVExtractTestCode.cpp
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@ -147,17 +147,20 @@ static StringAttr getNameForPort(Value val, ArrayAttr modulePorts) {
return reg.getNameAttr();
}
} else if (auto inst = dyn_cast<hw::InstanceOp>(op)) {
for (auto [index, result] : llvm::enumerate(inst.getResults()))
if (result == val) {
SmallString<64> portName = inst.getInstanceName();
portName += ".";
auto resultName = inst.getResultName(index);
if (resultName && !resultName.getValue().empty())
portName += resultName.getValue();
else
Twine(index).toVector(portName);
return StringAttr::get(val.getContext(), portName);
}
auto index = val.cast<mlir::OpResult>().getResultNumber();
SmallString<64> portName = inst.getInstanceName();
portName += ".";
auto resultName = inst.getResultName(index);
if (resultName && !resultName.getValue().empty())
portName += resultName.getValue();
else
Twine(index).toVector(portName);
return StringAttr::get(val.getContext(), portName);
} else if (op->getNumResults() == 1) {
if (auto name = op->getAttrOfType<StringAttr>("name"))
return name;
if (auto namehint = op->getAttrOfType<StringAttr>("sv.namehint"))
return namehint;
}
}

1
test/Dialect/SV/hw-extract-test-code.mlir
View File

@ -420,6 +420,7 @@ module {
module {
// CHECK-LABEL: @RegExtracted_cover
// CHECK-SAME: %designAndTestCode
// CHECK: %testCode1 = seq.firreg
// CHECK: %testCode2 = seq.firreg
// CHECK-NOT: seq.firreg