[Handshake] Only enable integration test with Vivado.

These were having issues with Quests. Tested with Vivado v2020.2.
This commit is contained in:
Mike Urbach 2021-05-07 15:11:52 -06:00
parent 238e8da2c7
commit 18bf7f2cfe
3 changed files with 6 additions and 6 deletions

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// REQUIRES: ieee-sim
// REQUIRES: vivado
// RUN: circt-opt %s --create-dataflow --simple-canonicalizer --cse --handshake-insert-buffer=strategies=all > %loop-handshake.mlir
// RUN: circt-opt %loop-handshake.mlir --lower-handshake-to-firrtl --firrtl-lower-types --firrtl-imconstprop --lower-firrtl-to-rtl --rtl-cleanup --simple-canonicalizer --cse --rtl-legalize-names > %loop-rtl.mlir
// RUN: circt-translate %loop-rtl.mlir --export-verilog > %loop-export.sv
// RUN: circt-rtl-sim.py %loop-export.sv %S/driver.sv --sim %ieee-sim --no-default-driver --top driver | FileCheck %s
// RUN: circt-rtl-sim.py %loop-export.sv %S/driver.sv --sim %xsim% --no-default-driver --top driver | FileCheck %s
// CHECK: Result={{.*}}42
module {

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// REQUIRES: ieee-sim
// REQUIRES: vivado
// RUN: circt-opt %s --create-dataflow --simple-canonicalizer --cse --handshake-insert-buffer > %mac-handshake.mlir
// RUN: circt-opt %mac-handshake.mlir --lower-handshake-to-firrtl --firrtl-lower-types --firrtl-imconstprop --lower-firrtl-to-rtl --rtl-memory-sim --rtl-cleanup --simple-canonicalizer --cse --rtl-legalize-names > %mac-rtl.mlir
// RUN: circt-translate %mac-rtl.mlir --export-verilog > %mac-export.sv
// RUN: circt-rtl-sim.py %mac-export.sv %S/driver.sv --sim %ieee-sim --no-default-driver --top driver | FileCheck %s
// RUN: circt-rtl-sim.py %mac-export.sv %S/driver.sv --sim %xsim% --no-default-driver --top driver | FileCheck %s
// CHECK: Result={{.*}}912
module {

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// REQUIRES: ieee-sim
// REQUIRES: vivado
// RUN: circt-opt %s --create-dataflow --simple-canonicalizer --cse --handshake-insert-buffer > %memory-handshake.mlir
// RUN: circt-opt %memory-handshake.mlir --lower-handshake-to-firrtl --firrtl-lower-types --firrtl-imconstprop --lower-firrtl-to-rtl --rtl-memory-sim --rtl-cleanup --simple-canonicalizer --cse --rtl-legalize-names > %memory-rtl.mlir
// RUN: circt-translate %memory-rtl.mlir --export-verilog > %memory-export.sv
// RUN: circt-rtl-sim.py %memory-export.sv %S/driver.sv --sim %ieee-sim --no-default-driver --top driver | FileCheck %s
// RUN: circt-rtl-sim.py %memory-export.sv %S/driver.sv --sim %xsim% --no-default-driver --top driver | FileCheck %s
// CHECK: Result={{.*}}34
module {