mirror of https://github.com/Qiskit/qiskit.git
2fe67f0589
* Initial: Add `Bit` and `Register` initial structs
Co-authored-by: Jake Lishman <jake.lishman@ibm.com>
* Add: `AncillaQubit` and `Clbit` python counterparts
* Add: `QuantumRegister` and `ClassicalRegister` python counterparts.
- Use `macro_rules!` to create `Bit` and `Registers`.
* Add: `AncillaRegister`
* Fix: Display methods
- Add `new_owned` method for `BitInfo`.
* Fix: Rebalance API to allow for superclasses
- Rebalance currently available api to allow for superclasses `Bit` and `Register` to also live in Rust.
- Remove: `ShareableBit` triat and structs that implement it. Replace them with new structs.
* Fix: Temporarily replace python instance, prepare for deletion.
- Add prefix class attribute for python `Register` instances.
* Fix: More rebalancing of the API.
- Add `BitExtraInfo` as a soft identifier for `BitInfo`, can be null to identify a `Bit`.
- Add `RegisterInfo::get` method to retrieve the information of a `Bit`.
- Have the rust registers own their counters instead of having them be Python exclusive.
- Make subclassing of `Regster` and `Bit` a bit more effective by helping the subclasses inherit most methods.
* Remove: `__getstate__`, `__setstate__` methods from `PyBit`.
* Fix: Intitial move to using rust native bits in `CircuitData` and `DAGCircuit`.
- Modify `BitData` to accept an extra generic value specifying a "sharable" object type that can also be turned into a `PyObject` to allow for compatibility with `Var`.
- Rename `BitAsKey` to `VarAsKey` as it is currently only used for `Var` instances.
- Modify methods in `CommutationChecker` and `GateDirection` passes to use the newer methods.
- Other tweaks and fixes.
* Fix: Implement `FromPyObject<'_>` for `SharableQubit` and `SharableClbit`.
- Remove imports of `QUBIT` and `CLBIT` from `DAGCircuit` and `CircuitData`.
* Fix: Discard cache when bits are added to `BitData`
- Discarded old equality and hashing methods for `PyBit` and `PyRegister`.
- Fix `replace_bits` to accept any iterator over `Qubits` and `Clbits` from Python.
- Add `is_empty` methods to Register data, wherever `len` is available.
- Add additional parsing during creation of `Register` to more closely match previous behavior.
- Modify `Bit` tests due to mocking no longer operating correctly.
* Fix: `__getitem__` methods in `Register` to preserve data
- Add method `register` to `BitData` to better represent a register reference in an owned bit.
* FIx: Streamline constructors for `Register`
- Add missing quotation marks in `Register` repr().
* Fix: Invalid `is` check during qpy serialization.
- Bits and registers that live in Rust are not guaranteed to pass the `is` equality check in Python.
- Restore type checking in `DAGCircuit` when adding bits.
* Fix: Incorrect serialization of `Bits`
- `Bits` should retain their hash value upon deserialization to avoid incorrect retrievals via hash or indexing. Fixed by implementing correct `__reduce__` method in `PyBit`, `PyClbit`, and `PyQubit`.
- Replace `__getnnewargs__` methods with `__reduce__` for more versatile serialization.
- Extend `SliceOrVec` to include a method that allows a vec with negative indices to correctly iterate based on a provided size.
- Modify `FullAncillaAllocation` to not replace the `QuantumRegister` prefix.
- Add `instances_count` getter attribute to all registers.
- `is` comparisons are no longer guaranteed to work between bits and registers. So some tests have been modified to reflect that.
- When `apply_operation` in the `DAGCircuit` receives a clbit in place of a qubit and viceversa, it will throw a type error, not a Key error. This is handled by PyO3 directly during extraction.
* Add: Store registers within `CircuitData`
- Create `RegisterData` struct which, similarly to how `BitData` works, stores the registers and allows to access them by key, in this case by name or index.
- Tweak `CircuitData` and `QuantumCircuit` api to allow for access of registers from within `CircuitData`.
- Add `qubit_indices` and `clbit_indices` structs to keep track of the locations of bits and registers within the circuit.
- Modify `circuit_to_dag` to obtain the registers directly from `CircuitData`.
- Modify `BlueprintCircuit` to rely on `CircuitData` to access `QuantumRegister` instances.
- Add setters and getters for registers.
- Modify `circuit_to_instruction` to bring over the registers into the definition of the `Instruction`.
- Add `contains` method to `BitData`.
- Add rust native `BitLocations` that can be converted to a `Python` version if needed.
* Add: Store native registers in `DAGCircuit`.
- Implemented `RegisterData` within the `DAGCircuit`.
- Modified methods of the `DAGCircuit` to utilize new native structures wherever possible.
- Modify `RegisterData` to not have a `description` attribute, and use an `IndexMap` to preserve insertion order of the registers.
- Use native initializers for Registers throughout the crate.
- Use native bits in initializer methods for `QuantumCircuit` and `ClassicalCircuit` instead of `BitData`.
- Modify additional `is` checks from tests where not needed.
- Modify `test_gate_definitions` to create owning registers when testing for definitions from the `EquivalenceLibrary`.
* Fix: Rebalance `RegisterData` to not use `IndexMap`.
- Fix `remove` method to work more efficiently and add `remove_registers` for multiple removals.
- Store index mapping between register name and `RegisterIndex<u32>` which is copyable.
* Add: `BitLocator` to keep a cached python version of bit indices.
* Fix: Oxideze `bit_argument_conversion`
- Now that the circuit contains all the available `Qubit` and `Clbit` information, this function can live entirely in Rust.
* Fix: Cleanse `DAGCircuit` from having `py` tokens when operating on `Bits` and `Registers`.
- Properly format code and skip certain buggy format checks.
* Docs: Add documentation to python classes and remove old code.
* Docs: Add release note
* Lint: Fix formatting issues.
* FIx: Remove stray comments
- Add dispose method to `BitLocator` and `RegisterData`.
- Make `BitInfo` private to the `circuit` crate.
- Add `cached_raw` getter to `BitLocator`.
* Add: `_check_dup` helper in Rust
* Addressing more review comments
* Fix lint
* Reword release note
* Update HighLevelSynthesis Rust code
* Remove stub files related to `Qubit`, `Bit`, `Register`, etc
These were internal-only modules for defining the bit and register
types. Since those types are now defined by `_accelerate`, there's no
reason to have the stub files.
Pylint makes several complaints about cyclic imports that Python is
perfectly capable of resolving; the choices are either to tell Pylint to
shut up (which we do) or to use overly specific imports in all of
`qiskit.circuit`.
* Revert changes to `SparseObservable`
* Move register definitions into `bit.rs`
The definition of registers is _really_ tightly coupled to the
definition of bits, and necessitated a lot of extra `pub(crate)`
specifiers to allow them to be separate. Bringing them into one file
makes it easy to do code-generating macros and keep internal details
internal.
* Reimplement `Bit` and `Register` with more type-safe logic
This is a major rewrite of the `Register` system in particular, but
significantly touches `Bit` as well.
This moves the type safety all the way down into the `BitInfo` and
`RegisterInfo` classes, with the exception that Rust space can
_technically_ have minor data incoherence between `AncillaRegister` and
contained qubits, though the internals are private and the constructors
will not allow this.
As a direct result (and as a deliberate aim), `Bit` and `Register` can
no longer be instantiated directly; there's no real concept of the
typeless base classes in Rust, so it takes quite a lot of gymnastics to
keep the old Python form working (where the old Python code wasn't
necessarily the best use of subclassing already).
The dynamic `Iterator` methods are now statically dispatched instead.
Much of the `inner_X` logic is gone; the classes interact a bit more
cleanly with each other. The bit and register types are constructed
simultaneously by macro, as are their Python-space variants; this
represents how coupled the classes are, and reduces the amount of
`pub(crate)` interfaces needed to split the files.
Changes in the tests are to account for some standard Python errors
changing from `CircuitError` to the more standard `TypeError`, and to
deal with the fact that `Bit` and `Register` cannot be constructed
directly. Also, some tests inserting insane and undocumented behaviour
like having `QuantumRegister(2.0)` be valid, are gone.
The `__repr__` of `Bit` is now shorter and a bit more legible.
* Remove 'description' field from 'BitData'
* Fix `CommutationChecker` use of `BitData`
It's plausible that this commit is a minor performance regression
because of the extra `Vec`s, but there's _a bunch_ of improvements to
make in the handling of this pass, so maybe best not to worry about it.
* Address review comments in `CircuitData`
Co-authored-by: Matthew Treinish <mtreinish@kortar.org>
* Address review comments in `BitLocator`
* Minor review nits
* Fix Rust-space test
* Small-scale DAG review comments
* Remove a couple of unnecessary clones
* Revert "Fix `CommutationChecker` use of `BitData`"
This reverts commit
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| get_versions.py | ||
| process_version.sh | ||
| qpy_test_constraints.txt | ||
| run_tests.sh | ||
| test_qpy.py | ||