Elena Peña Tapia fcb5d29c6e Remove fake backends based on `BackendV1` and related tools (#13805) ... * Remove FakeBackend, FakeQasmBackend, FakePulseBackend, subclasses, any tests that checked V1 functionality, mitigators (independent removal). Update rest of unit tests to use GenericBackendV2 * Remove FakeBackend references from docs (these classes will be removed in 2.0 so no alternative is provided) * Fix lint and apply desperate measures until better measures are found (visual tests). * Add renos * Fix scheduling tests, lints and docs issue. * Apply suggestions from Eli's code review Co-authored-by: Eli Arbel <46826214+eliarbel@users.noreply.github.com> * Migrate relevant fake backend tests to test_generic_backend_v2.py, remove non-relevant tests * Fix merge conflict, apply review suggestions reno * Fix reno typo Co-authored-by: Eli Arbel <46826214+eliarbel@users.noreply.github.com> --------- Co-authored-by: Eli Arbel <46826214+eliarbel@users.noreply.github.com>		2025-02-28 12:46:24 +00:00
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5_plot_circuit_layout.png	Remove fake backends based on `BackendV1` and related tools (#13805)	2025-02-28 12:46:24 +00:00
5bit_quantum_computer.png	Remove fake backends based on `BackendV1` and related tools (#13805)	2025-02-28 12:46:24 +00:00
7_plot_circuit_layout.png	Remove fake backends based on `BackendV1` and related tools (#13805)	2025-02-28 12:46:24 +00:00
7bit_quantum_computer.png	Remove fake backends based on `BackendV1` and related tools (#13805)	2025-02-28 12:46:24 +00:00
8qubits.png	New plot_coupling_map(), like plot_gate_map() but without a backend (#6751)	2021-08-17 11:02:57 +00:00
20_plot_circuit_layout.png	Remove fake backends based on `BackendV1` and related tools (#13805)	2025-02-28 12:46:24 +00:00
20bit_quantum_computer.png	Remove fake backends based on `BackendV1` and related tools (#13805)	2025-02-28 12:46:24 +00:00
circuit_text_ref_cp437.txt	Move gate, control, and param label selections from 3 circuit drawers to utils (#6078)	2021-06-26 00:42:24 +00:00
circuit_text_ref_utf8.txt	Move gate, control, and param label selections from 3 circuit drawers to utils (#6078)	2021-06-26 00:42:24 +00:00
coupling_map.png	Switch draw functions from `pydot` to `retworkx` (#8198)	2022-09-01 16:03:48 +00:00
dag_dep.png	Remove condition/c_if, duration, and unit from instructions (#13506)	2025-02-24 15:33:45 +00:00
dag_no_reg.png	Update and expand DAGDependency drawer (#11103)	2023-11-02 09:14:20 +00:00
equivalence_library.png	Fix flaky equivalence drawer test (#8659)	2022-09-02 00:49:46 +00:00
fake_27_q_error.png	Add generic V1 Fake Backends, replace use in tests (#10952)	2024-02-01 05:59:55 +00:00
fake_27_q_v2_error.png	Add generic V1 Fake Backends, replace use in tests (#10952)	2024-02-01 05:59:55 +00:00
fake_127_q_error.png	Add generic V1 Fake Backends, replace use in tests (#10952)	2024-02-01 05:59:55 +00:00
fake_127_q_v2_error.png	Add generic V1 Fake Backends, replace use in tests (#10952)	2024-02-01 05:59:55 +00:00
pass_manager_standard.dot	Fix pass-manager drawing tests for pydot 3.0 (#12775)	2024-07-16 13:24:21 +00:00
pass_manager_style.dot	Fix pass-manager drawing tests for pydot 3.0 (#12775)	2024-07-16 13:24:21 +00:00
test_latex_barrier_label.tex	Add barrier labels and display in 3 circuit drawers (#8440)	2022-08-19 15:49:15 +00:00
test_latex_big_gates.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_cnot.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_creg_initial_false.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_creg_initial_true.tex	Fix display of register names with multiple underscores in mpl and latex drawers (#7459)	2022-01-13 17:34:16 +00:00
test_latex_cswap_rzz.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_deep.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_empty.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_ghz_to_gate.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_global_phase.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_huge.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_idle_wires_barrier.tex	Fix MPL and LaTeX circuit drawer when `idle_wires=False` and there are barriers (#8321)	2022-07-28 23:37:43 +02:00
test_latex_init_reset.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_inst_with_cbits.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_iqx.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_long_name.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_multi_underscore_false.tex	Fix display of register names with multiple underscores in mpl and latex drawers (#7459)	2022-01-13 17:34:16 +00:00
test_latex_multi_underscore_true.tex	Fix display of register names with multiple underscores in mpl and latex drawers (#7459)	2022-01-13 17:34:16 +00:00
test_latex_no_barriers_false.tex	Fix display of register names with multiple underscores in mpl and latex drawers (#7459)	2022-01-13 17:34:16 +00:00
test_latex_no_ops.tex	Fix display of register names with multiple underscores in mpl and latex drawers (#7459)	2022-01-13 17:34:16 +00:00
test_latex_normal.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_partial_layout.tex	Add generic V1 Fake Backends, replace use in tests (#10952)	2024-02-01 05:59:55 +00:00
test_latex_pauli_clifford.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_pi_param_expr.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_plot_barriers_false.tex	Remove ``qiskit.extensions`` (#11488)	2024-01-17 16:36:52 +00:00
test_latex_plot_barriers_true.tex	Remove ``qiskit.extensions`` (#11488)	2024-01-17 16:36:52 +00:00
test_latex_plot_partial_barriers.tex	Fix display of register names with multiple underscores in mpl and latex drawers (#7459)	2022-01-13 17:34:16 +00:00
test_latex_r_gates.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_registerless_one_bit.tex	Fix reverse_bits with registerless bits in all 3 circuit drawers (#7319)	2022-02-11 19:36:24 +01:00
test_latex_reverse_bits.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_scale_default.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_scale_double.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_scale_half.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_tiny.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00
test_latex_u_gates.tex	Fix display of registerless bits in all drawers and change display of one-bit registers (#6942)	2021-09-13 21:06:37 +00:00