mirror of https://github.com/Qiskit/qiskit.git
192 lines
8.0 KiB
Python
192 lines
8.0 KiB
Python
# This code is part of Qiskit.
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#
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# (C) Copyright IBM 2017, 2018.
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#
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# This code is licensed under the Apache License, Version 2.0. You may
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# obtain a copy of this license in the LICENSE.txt file in the root directory
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# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.
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#
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# Any modifications or derivative works of this code must retain this
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# copyright notice, and modified files need to carry a notice indicating
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# that they have been altered from the originals.
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"""Tests for the converters."""
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import unittest
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from qiskit.dagcircuit import DAGCircuit
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from qiskit.circuit import QuantumRegister, ClassicalRegister, QuantumCircuit, Clbit, SwitchCaseOp
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from qiskit.circuit.library import HGate, Measure
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from qiskit.circuit.classical import expr, types
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from qiskit.converters import dag_to_circuit, circuit_to_dag
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from test import QiskitTestCase # pylint: disable=wrong-import-order
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class TestCircuitToDag(QiskitTestCase):
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"""Test Circuit to DAG."""
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def test_circuit_and_dag(self):
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"""Check convert to dag and back"""
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qr = QuantumRegister(3)
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cr = ClassicalRegister(3)
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circuit_in = QuantumCircuit(qr, cr)
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circuit_in.h(qr[0])
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circuit_in.h(qr[1])
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circuit_in.measure(qr[0], cr[0])
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circuit_in.measure(qr[1], cr[1])
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with self.assertWarns(DeprecationWarning):
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circuit_in.x(qr[0]).c_if(cr, 0x3)
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circuit_in.measure(qr[0], cr[0])
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circuit_in.measure(qr[1], cr[1])
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circuit_in.measure(qr[2], cr[2])
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dag = circuit_to_dag(circuit_in)
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circuit_out = dag_to_circuit(dag)
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self.assertEqual(circuit_out, circuit_in)
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def test_calibrations(self):
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"""Test that calibrations are properly copied over."""
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circuit_in = QuantumCircuit(1)
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with self.assertWarns(DeprecationWarning):
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circuit_in.add_calibration("h", [0], None)
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self.assertEqual(len(circuit_in.calibrations), 1)
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dag = circuit_to_dag(circuit_in)
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with self.assertWarns(DeprecationWarning):
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self.assertEqual(len(dag.calibrations), 1)
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circuit_out = dag_to_circuit(dag)
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with self.assertWarns(DeprecationWarning):
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self.assertEqual(len(circuit_out.calibrations), 1)
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def test_wires_from_expr_nodes_condition(self):
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"""Test that the classical wires implied by an `Expr` node in a control-flow op's
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`condition` are correctly transferred."""
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# The control-flow builder interface always includes any classical wires in the blocks of
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# the operation, so we test by using manually constructed blocks that don't do that. It's
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# not required by the `QuantumCircuit` model (just like `c_if` instructions don't expand
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# their `cargs`).
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inner = QuantumCircuit(1)
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inner.x(0)
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cr1 = ClassicalRegister(2, "a")
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cr2 = ClassicalRegister(2, "b")
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clbit = Clbit()
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outer = QuantumCircuit(QuantumRegister(1), cr1, cr2, [clbit])
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# Note that 'cr2' is not in the condition.
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outer.if_test(expr.logic_and(expr.equal(cr1, 3), expr.logic_not(clbit)), inner, [0], [])
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outer.while_loop(expr.logic_or(expr.less(2, cr1), clbit), inner, [0], [])
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dag = circuit_to_dag(outer)
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expected_wires = set(outer.qubits) | set(cr1) | {clbit}
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for node in dag.topological_op_nodes():
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test_wires = {wire for _source, _dest, wire in dag.edges(node)}
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self.assertIsInstance(node.op.condition, expr.Expr)
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self.assertEqual(test_wires, expected_wires)
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roundtripped = dag_to_circuit(dag)
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for original, test in zip(outer, roundtripped):
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self.assertEqual(original.operation.condition, test.operation.condition)
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def test_wires_from_expr_nodes_target(self):
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"""Test that the classical wires implied by an `Expr` node in a control-flow op's
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`target` are correctly transferred."""
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case_1 = QuantumCircuit(1)
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case_1.x(0)
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case_2 = QuantumCircuit(1)
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case_2.y(0)
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cr1 = ClassicalRegister(2, "a")
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cr2 = ClassicalRegister(2, "b")
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outer = QuantumCircuit(QuantumRegister(1), cr1, cr2)
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# Note that 'cr2' is not in the condition.
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outer.switch(expr.bit_and(cr1, 2), [(1, case_1), (2, case_2)], [0], [])
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dag = circuit_to_dag(outer)
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expected_wires = set(outer.qubits) | set(cr1)
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for node in dag.topological_op_nodes():
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test_wires = {wire for _source, _dest, wire in dag.edges(node)}
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self.assertIsInstance(node.op.target, expr.Expr)
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self.assertEqual(test_wires, expected_wires)
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roundtripped = dag_to_circuit(dag)
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for original, test in zip(outer, roundtripped):
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self.assertEqual(original.operation.target, test.operation.target)
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def test_runtime_vars_in_roundtrip(self):
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"""`expr.Var` nodes should be fully roundtripped."""
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a = expr.Var.new("a", types.Bool())
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b = expr.Var.new("b", types.Bool())
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c = expr.Var.new("c", types.Uint(8))
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d = expr.Var.new("d", types.Uint(8))
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qc = QuantumCircuit(inputs=[a, c])
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qc.add_var(b, False)
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qc.add_var(d, 255)
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qc.store(a, expr.logic_or(a, b))
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with qc.if_test(expr.logic_and(a, expr.equal(c, d))):
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pass
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with qc.while_loop(a):
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qc.store(a, expr.logic_or(a, b))
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with qc.switch(d) as case:
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with case(0):
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qc.store(c, d)
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with case(case.DEFAULT):
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qc.store(a, False)
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roundtrip = dag_to_circuit(circuit_to_dag(qc))
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self.assertEqual(qc, roundtrip)
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self.assertIsInstance(qc.data[-1].operation, SwitchCaseOp)
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# This is guaranteed to be topologically last, even after the DAG roundtrip.
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self.assertIsInstance(roundtrip.data[-1].operation, SwitchCaseOp)
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self.assertEqual(qc.data[-1].operation.blocks, roundtrip.data[-1].operation.blocks)
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blocks = roundtrip.data[-1].operation.blocks
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self.assertEqual(set(blocks[0].iter_captured_vars()), {c, d})
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self.assertEqual(set(blocks[1].iter_captured_vars()), {a})
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def test_wire_order(self):
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"""Test that the `qubit_order` and `clbit_order` parameters are respected."""
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permutation = [2, 3, 1, 4, 0, 5] # Arbitrary.
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qr = QuantumRegister(len(permutation), "qr")
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cr = ClassicalRegister(len(permutation), "cr")
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qubits_permuted = [qr[i] for i in permutation]
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clbits_permuted = [cr[i] for i in permutation]
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qc = QuantumCircuit(qr, cr)
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for q, c in zip(qr, cr):
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qc.h(q)
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qc.measure(q, c)
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dag = circuit_to_dag(qc, qubit_order=qubits_permuted, clbit_order=clbits_permuted)
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expected = DAGCircuit()
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expected.add_qubits(qubits_permuted)
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expected.add_clbits(clbits_permuted)
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expected.add_qreg(qr)
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expected.add_creg(cr)
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for q, c in zip(qr, cr):
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expected.apply_operation_back(HGate(), [q], [])
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expected.apply_operation_back(Measure(), [q], [c])
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self.assertEqual(dag, expected)
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self.assertEqual(list(dag.qubits), qubits_permuted)
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self.assertEqual(list(dag.clbits), clbits_permuted)
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def test_wire_order_failures(self):
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"""Test that the `qubit_order` and `clbit_order` parameters raise on bad inputs."""
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qr = QuantumRegister(3, "qr")
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cr = ClassicalRegister(3, "cr")
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qc = QuantumCircuit(qr, cr)
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with self.assertRaisesRegex(ValueError, "does not contain exactly the same"):
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circuit_to_dag(qc, qubit_order=qc.qubits[:-1])
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with self.assertRaisesRegex(ValueError, "does not contain exactly the same"):
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circuit_to_dag(qc, qubit_order=qr[[0, 1, 1]])
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with self.assertRaisesRegex(ValueError, "does not contain exactly the same"):
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circuit_to_dag(qc, clbit_order=qc.clbits[:-1])
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with self.assertRaisesRegex(ValueError, "does not contain exactly the same"):
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circuit_to_dag(qc, clbit_order=cr[[0, 1, 1]])
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if __name__ == "__main__":
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unittest.main(verbosity=2)
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