mirror of https://github.com/Qiskit/qiskit.git
Fix QPY handling of registers (#9095)
* Fix QPY handling of registers QPY previously had rather complicated logic to handle deserialisation of registers that was heavily couched in the old model of registers "owning" the bits they contained. This is no longer the data model of the circuit, so the code was naturally complex to try and make it work. Instead, in deserialisation now we just add the correct number of bit instances to the circuit at the start, and then build up any required registers by using the `indices` field. It's not clear to me how an index ever could be negative here; it's not clear how a register could be in the circuit but its bits aren't added, so it feels like there might be the possibility of a bug I've missed. * Remove unused import * Add tests cases of empty registers Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
This commit is contained in:
Jake Lishman
GitHub
parent
02a193919c
commit
c0ac5fbd21
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@ -32,7 +32,7 @@ from qiskit.circuit.instruction import Instruction
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from qiskit.circuit.quantumcircuit import QuantumCircuit
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from qiskit.circuit.quantumregister import QuantumRegister, Qubit
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from qiskit.extensions import quantum_initializer
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from qiskit.qpy import common, formats, exceptions, type_keys
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from qiskit.qpy import common, formats, type_keys
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from qiskit.qpy.binary_io import value, schedules
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from qiskit.quantum_info.operators import SparsePauliOp
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from qiskit.synthesis import evolution as evo_synth
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@ -845,117 +845,6 @@ def read_circuit(file_obj, version, metadata_deserializer=None):
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num_registers = header["num_registers"]
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num_instructions = header["num_instructions"]
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out_registers = {"q": {}, "c": {}}
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if num_registers > 0:
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circ = QuantumCircuit(name=name, global_phase=global_phase, metadata=metadata)
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if version < 4:
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registers = _read_registers(file_obj, num_registers)
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else:
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registers = _read_registers_v4(file_obj, num_registers)
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for bit_type_label, bit_type, reg_type in [
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("q", Qubit, QuantumRegister),
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("c", Clbit, ClassicalRegister),
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]:
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register_bits = set()
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# Add quantum registers and bits
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for register_name in registers[bit_type_label]:
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standalone, indices, in_circuit = registers[bit_type_label][register_name]
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indices_defined = [x for x in indices if x >= 0]
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# If a register has no bits in the circuit skip it
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if not indices_defined:
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continue
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if standalone:
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start = min(indices_defined)
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count = start
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out_of_order = False
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for index in indices:
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if index < 0:
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out_of_order = True
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continue
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if not out_of_order and index != count:
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out_of_order = True
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count += 1
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if index in register_bits:
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# If we have a bit in the position already it's been
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# added by an earlier register in the circuit
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# otherwise it's invalid qpy
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if not in_circuit:
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continue
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raise exceptions.QpyError("Duplicate register bits found")
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register_bits.add(index)
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num_reg_bits = len(indices)
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# Create a standlone register of the appropriate length (from
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# the number of indices in the qpy data) and add it to the circuit
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reg = reg_type(num_reg_bits, register_name)
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# If any bits from qreg are out of order in the circuit handle
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# is case
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if out_of_order or not in_circuit:
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for index, pos in sorted(
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enumerate(x for x in indices if x >= 0), key=lambda x: x[1]
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):
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if bit_type_label == "q":
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bit_len = len(circ.qubits)
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else:
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bit_len = len(circ.clbits)
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if pos < bit_len:
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# If we have a bit in the position already it's been
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# added by an earlier register in the circuit
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# otherwise it's invalid qpy
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if not in_circuit:
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continue
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raise exceptions.QpyError("Duplicate register bits found")
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# Fill any holes between the current register bit and the
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# next one
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if pos > bit_len:
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bits = [bit_type() for _ in range(pos - bit_len)]
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circ.add_bits(bits)
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circ.add_bits([reg[index]])
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if in_circuit:
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circ.add_register(reg)
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else:
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if bit_type_label == "q":
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bit_len = len(circ.qubits)
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else:
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bit_len = len(circ.clbits)
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# If there is a hole between the start of the register and the
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# current bits and standalone bits to fill the gap.
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if start > len(circ.qubits):
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bits = [bit_type() for _ in range(start - bit_len)]
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circ.add_bits(bit_len)
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if in_circuit:
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circ.add_register(reg)
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out_registers[bit_type_label][register_name] = reg
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else:
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for index in indices:
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if bit_type_label == "q":
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bit_len = len(circ.qubits)
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else:
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bit_len = len(circ.clbits)
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# Add any missing bits
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bits = [bit_type() for _ in range(index + 1 - bit_len)]
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circ.add_bits(bits)
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if index in register_bits:
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raise exceptions.QpyError("Duplicate register bits found")
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register_bits.add(index)
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if bit_type_label == "q":
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bits = [circ.qubits[i] for i in indices]
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else:
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bits = [circ.clbits[i] for i in indices]
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reg = reg_type(name=register_name, bits=bits)
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if in_circuit:
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circ.add_register(reg)
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out_registers[bit_type_label][register_name] = reg
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# If we don't have sufficient bits in the circuit after adding
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# all the registers add more bits to fill the circuit
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if len(circ.qubits) < num_qubits:
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qubits = [Qubit() for _ in range(num_qubits - len(circ.qubits))]
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circ.add_bits(qubits)
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if len(circ.clbits) < num_clbits:
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clbits = [Clbit() for _ in range(num_clbits - len(circ.clbits))]
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circ.add_bits(clbits)
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else:
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circ = QuantumCircuit(
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[Qubit() for _ in [None] * num_qubits],
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[Clbit() for _ in [None] * num_clbits],
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@ -963,6 +852,22 @@ def read_circuit(file_obj, version, metadata_deserializer=None):
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global_phase=global_phase,
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metadata=metadata,
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)
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if num_registers > 0:
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if version < 4:
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registers = _read_registers(file_obj, num_registers)
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else:
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registers = _read_registers_v4(file_obj, num_registers)
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for bit_type_label, reg_type in [("q", QuantumRegister), ("c", ClassicalRegister)]:
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# Add quantum registers and bits
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circuit_bits = {"q": circ.qubits, "c": circ.clbits}[bit_type_label]
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for register_name, (_, indices, in_circuit) in registers[bit_type_label].items():
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register = reg_type(
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name=register_name, bits=[circuit_bits[x] for x in indices if x >= 0]
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)
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if in_circuit:
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circ.add_register(register)
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out_registers[bit_type_label][register_name] = register
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custom_operations = _read_custom_operations(file_obj, version, vectors)
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for _instruction in range(num_instructions):
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_read_instruction(file_obj, circ, out_registers, custom_operations, version, vectors)
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@ -0,0 +1,6 @@
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---
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fixes:
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- |
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Fixed a bug in QPY (:mod:`qiskit.qpy`) where circuits containing registers
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whose bits occurred in the circuit after loose bits would fail to deserialize.
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See `#9094 <https://github.com/Qiskit/qiskit-terra/issues/9094>`__.
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@ -1103,3 +1103,65 @@ class TestLoadFromQPY(QiskitTestCase):
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qpy_file.seek(0)
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new_circuit = load(qpy_file)[0]
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self.assertEqual(qc, new_circuit)
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def test_registers_after_loose_bits(self):
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"""Test that a circuit whose registers appear after some loose bits roundtrips. Regression
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test of gh-9094."""
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qc = QuantumCircuit()
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qc.add_bits([Qubit(), Clbit()])
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qc.add_register(QuantumRegister(2, name="q1"))
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qc.add_register(ClassicalRegister(2, name="c1"))
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with io.BytesIO() as fptr:
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dump(qc, fptr)
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fptr.seek(0)
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new_circuit = load(fptr)[0]
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self.assertEqual(qc, new_circuit)
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def test_roundtrip_empty_register(self):
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"""Test that empty registers round-trip correctly."""
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qc = QuantumCircuit(QuantumRegister(0), ClassicalRegister(0))
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with io.BytesIO() as fptr:
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dump(qc, fptr)
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fptr.seek(0)
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new_circuit = load(fptr)[0]
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self.assertEqual(qc, new_circuit)
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self.assertEqual(qc.qregs, new_circuit.qregs)
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self.assertEqual(qc.cregs, new_circuit.cregs)
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def test_roundtrip_several_empty_registers(self):
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"""Test that several empty registers round-trip correctly."""
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qc = QuantumCircuit(
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QuantumRegister(0, "a"),
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QuantumRegister(0, "b"),
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ClassicalRegister(0, "c"),
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ClassicalRegister(0, "d"),
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)
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with io.BytesIO() as fptr:
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dump(qc, fptr)
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fptr.seek(0)
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new_circuit = load(fptr)[0]
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self.assertEqual(qc, new_circuit)
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self.assertEqual(qc.qregs, new_circuit.qregs)
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self.assertEqual(qc.cregs, new_circuit.cregs)
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def test_roundtrip_empty_registers_with_loose_bits(self):
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"""Test that empty registers still round-trip correctly in the presence of loose bits."""
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loose = [Qubit(), Clbit()]
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qc = QuantumCircuit(loose, QuantumRegister(0), ClassicalRegister(0))
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with io.BytesIO() as fptr:
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dump(qc, fptr)
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fptr.seek(0)
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new_circuit = load(fptr)[0]
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self.assertEqual(qc, new_circuit)
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self.assertEqual(qc.qregs, new_circuit.qregs)
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self.assertEqual(qc.cregs, new_circuit.cregs)
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qc = QuantumCircuit(QuantumRegister(0), ClassicalRegister(0), loose)
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with io.BytesIO() as fptr:
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dump(qc, fptr)
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fptr.seek(0)
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new_circuit = load(fptr)[0]
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self.assertEqual(qc, new_circuit)
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self.assertEqual(qc.qregs, new_circuit.qregs)
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self.assertEqual(qc.cregs, new_circuit.cregs)
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