From 5421ec6e6948d8895676403990fb3bfe5c559273 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Alves?= Date: Mon, 15 Apr 2024 09:59:09 +0200 Subject: [PATCH] Fixes "phsyical" Typos (#12180) * fixes typo * fixes typo --- qiskit/transpiler/passes/basis/unroll_3q_or_more.py | 2 +- qiskit/transpiler/passes/layout/apply_layout.py | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/qiskit/transpiler/passes/basis/unroll_3q_or_more.py b/qiskit/transpiler/passes/basis/unroll_3q_or_more.py index 36433c71d1..701e87dd9c 100644 --- a/qiskit/transpiler/passes/basis/unroll_3q_or_more.py +++ b/qiskit/transpiler/passes/basis/unroll_3q_or_more.py @@ -63,7 +63,7 @@ class Unroll3qOrMore(TransformationPass): if self.target is not None: # Treat target instructions as global since this pass can be run - # prior to layout and routing we don't have phsyical qubits from + # prior to layout and routing we don't have physical qubits from # the circuit yet if node.name in self.target: continue diff --git a/qiskit/transpiler/passes/layout/apply_layout.py b/qiskit/transpiler/passes/layout/apply_layout.py index 8c6ed2cfec..c36a7e1110 100644 --- a/qiskit/transpiler/passes/layout/apply_layout.py +++ b/qiskit/transpiler/passes/layout/apply_layout.py @@ -71,9 +71,9 @@ class ApplyLayout(TransformationPass): } for qreg in dag.qregs.values(): self.property_set["layout"].add_register(qreg) - virtual_phsyical_map = layout.get_virtual_bits() + virtual_physical_map = layout.get_virtual_bits() for node in dag.topological_op_nodes(): - qargs = [q[virtual_phsyical_map[qarg]] for qarg in node.qargs] + qargs = [q[virtual_physical_map[qarg]] for qarg in node.qargs] new_dag.apply_operation_back(node.op, qargs, node.cargs, check=False) else: # First build a new layout object going from: