mirror of https://github.com/Qiskit/qiskit.git
"cregbundle set to False" warning should not raised when no classical bits are involved (#8689)
* "cregbundle set to False" warning should not raised when no classical bits are involved * add link to the issue/PR * wrapping * compare result * test resull * handle default in a consist way * comparison * remove warning * set default mpl and latex * adjust test * Apply suggestions from code review Co-authored-by: Matthew Treinish <mtreinish@kortar.org> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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@ -1834,7 +1834,7 @@ class QuantumCircuit:
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# safely forward-referenced.
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# safely forward-referenced.
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ax: Optional[typing.Any] = None,
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ax: Optional[typing.Any] = None,
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initial_state: bool = False,
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initial_state: bool = False,
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cregbundle: bool = True,
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cregbundle: bool = None,
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wire_order: list = None,
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wire_order: list = None,
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):
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):
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"""Draw the quantum circuit. Use the output parameter to choose the drawing format:
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"""Draw the quantum circuit. Use the output parameter to choose the drawing format:
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@ -1916,7 +1916,7 @@ class QuantumCircuit:
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initial_state (bool): Optional. Adds ``|0>`` in the beginning of the wire.
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initial_state (bool): Optional. Adds ``|0>`` in the beginning of the wire.
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Default is False.
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Default is False.
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cregbundle (bool): Optional. If set True, bundle classical registers.
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cregbundle (bool): Optional. If set True, bundle classical registers.
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Default is True.
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Default is True, except for when ``output`` is set to ``"text"``.
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wire_order (list): Optional. A list of integers used to reorder the display
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wire_order (list): Optional. A list of integers used to reorder the display
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of the bits. The list must have an entry for every bit with the bits
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of the bits. The list must have an entry for every bit with the bits
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in the range 0 to (num_qubits + num_clbits).
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in the range 0 to (num_qubits + num_clbits).
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@ -59,7 +59,7 @@ def circuit_drawer(
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fold=None,
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fold=None,
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ax=None,
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ax=None,
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initial_state=False,
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initial_state=False,
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cregbundle=True,
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cregbundle=None,
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wire_order=None,
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wire_order=None,
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):
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):
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"""Draw the quantum circuit. Use the output parameter to choose the drawing format:
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"""Draw the quantum circuit. Use the output parameter to choose the drawing format:
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@ -142,7 +142,7 @@ def circuit_drawer(
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initial_state (bool): Optional. Adds ``|0>`` in the beginning of the wire.
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initial_state (bool): Optional. Adds ``|0>`` in the beginning of the wire.
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Default is False.
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Default is False.
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cregbundle (bool): Optional. If set True, bundle classical registers.
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cregbundle (bool): Optional. If set True, bundle classical registers.
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Default is True.
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Default is True, except for when ``output`` is set to ``"text"``.
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wire_order (list): Optional. A list of integers used to reorder the display
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wire_order (list): Optional. A list of integers used to reorder the display
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of the bits. The list must have an entry for every bit with the bits
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of the bits. The list must have an entry for every bit with the bits
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in the range 0 to (num_qubits + num_clbits).
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in the range 0 to (num_qubits + num_clbits).
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@ -207,7 +207,7 @@ def circuit_drawer(
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"wire_order list for the index of each qubit and each clbit in the circuit."
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"wire_order list for the index of each qubit and each clbit in the circuit."
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)
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)
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if cregbundle and (reverse_bits or wire_order is not None):
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if circuit.clbits and cregbundle and (reverse_bits or wire_order is not None):
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cregbundle = False
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cregbundle = False
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warn(
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warn(
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"Cregbundle set to False since either reverse_bits or wire_order has been set.",
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"Cregbundle set to False since either reverse_bits or wire_order has been set.",
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@ -241,7 +241,7 @@ def circuit_drawer(
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idle_wires=idle_wires,
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idle_wires=idle_wires,
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with_layout=with_layout,
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with_layout=with_layout,
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initial_state=initial_state,
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initial_state=initial_state,
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cregbundle=cregbundle,
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cregbundle=cregbundle if cregbundle is not None else True,
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wire_order=wire_order,
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wire_order=wire_order,
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)
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)
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elif output == "latex_source":
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elif output == "latex_source":
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@ -256,7 +256,7 @@ def circuit_drawer(
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idle_wires=idle_wires,
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idle_wires=idle_wires,
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with_layout=with_layout,
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with_layout=with_layout,
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initial_state=initial_state,
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initial_state=initial_state,
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cregbundle=cregbundle,
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cregbundle=cregbundle if cregbundle is not None else True,
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wire_order=wire_order,
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wire_order=wire_order,
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)
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)
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elif output == "mpl":
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elif output == "mpl":
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@ -302,7 +302,7 @@ def _text_circuit_drawer(
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with_layout=True,
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with_layout=True,
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fold=None,
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fold=None,
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initial_state=True,
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initial_state=True,
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cregbundle=False,
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cregbundle=None,
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encoding=None,
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encoding=None,
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wire_order=None,
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wire_order=None,
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):
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):
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@ -652,7 +652,7 @@ def _matplotlib_circuit_drawer(
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fold=fold,
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fold=fold,
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ax=ax,
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ax=ax,
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initial_state=initial_state,
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initial_state=initial_state,
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cregbundle=cregbundle,
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cregbundle=cregbundle if cregbundle is not None else True,
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global_phase=None,
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global_phase=None,
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calibrations=None,
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calibrations=None,
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qregs=None,
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qregs=None,
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@ -607,7 +607,7 @@ class TextDrawing:
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vertical_compression="high",
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vertical_compression="high",
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layout=None,
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layout=None,
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initial_state=True,
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initial_state=True,
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cregbundle=False,
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cregbundle=None,
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global_phase=None,
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global_phase=None,
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encoding=None,
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encoding=None,
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qregs=None,
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qregs=None,
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@ -675,7 +675,8 @@ class TextDrawing:
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self.layout = None
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self.layout = None
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self.initial_state = initial_state
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self.initial_state = initial_state
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self.cregbundle = cregbundle
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self._cregbundle = cregbundle
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self._default_cregbundle = False
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self.global_phase = circuit.global_phase
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self.global_phase = circuit.global_phase
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self.plotbarriers = plotbarriers
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self.plotbarriers = plotbarriers
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self.reverse_bits = reverse_bits
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self.reverse_bits = reverse_bits
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@ -693,6 +694,13 @@ class TextDrawing:
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else:
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else:
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self.encoding = "utf8"
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self.encoding = "utf8"
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@property
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def cregbundle(self):
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"""cregbundle, depending if it was explicitly set or not"""
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if self._cregbundle is not None:
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return self._cregbundle
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return self._default_cregbundle
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def __str__(self):
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def __str__(self):
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return self.single_string()
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return self.single_string()
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@ -761,13 +769,14 @@ class TextDrawing:
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try:
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try:
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layers = self.build_layers()
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layers = self.build_layers()
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except TextDrawerCregBundle:
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except TextDrawerCregBundle:
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self.cregbundle = False
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if self._cregbundle is not None:
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warn(
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self._cregbundle = False
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'The parameter "cregbundle" was disabled, since an instruction needs to refer to '
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warn(
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"individual classical wires",
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'The parameter "cregbundle" was disabled, since an instruction needs to refer to '
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RuntimeWarning,
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"individual classical wires",
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2,
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RuntimeWarning,
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)
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2,
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)
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layers = self.build_layers()
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layers = self.build_layers()
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layer_groups = [[]]
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layer_groups = [[]]
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@ -1210,7 +1219,7 @@ class TextDrawing:
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class Layer:
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class Layer:
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"""A layer is the "column" of the circuit."""
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"""A layer is the "column" of the circuit."""
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def __init__(self, qubits, clbits, cregbundle=False, circuit=None):
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def __init__(self, qubits, clbits, cregbundle, circuit=None):
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self.qubits = qubits
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self.qubits = qubits
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self.clbits_raw = clbits # list of clbits ignoring cregbundle change below
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self.clbits_raw = clbits # list of clbits ignoring cregbundle change below
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self._circuit = circuit
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self._circuit = circuit
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@ -0,0 +1,7 @@
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---
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fixes:
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- |
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Fixed an issue when :func:`~circuit_drawer` was used with ``reverse_bits=True`` on a
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circuit without classical bits that would cause a potentially confusing warning about
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``cregbundle`` to be emitted.
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Fixed `#8690 <https://github.com/Qiskit/qiskit-terra/issues/8690>`__
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@ -119,3 +119,45 @@ class TestCircuitDrawer(QiskitTestCase):
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with self.assertWarnsRegex(RuntimeWarning, "Cregbundle set"):
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with self.assertWarnsRegex(RuntimeWarning, "Cregbundle set"):
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visualization.circuit_drawer(circuit, cregbundle=True, wire_order=[0, 1, 2, 5, 4, 3])
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visualization.circuit_drawer(circuit, cregbundle=True, wire_order=[0, 1, 2, 5, 4, 3])
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def test_reverse_bits(self):
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"""Test reverse_bits should not raise warnings when no classical qubits:
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See: https://github.com/Qiskit/qiskit-terra/pull/8689"""
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circuit = QuantumCircuit(3)
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circuit.x(1)
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expected = "\n".join(
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[
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" ",
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"q_2: ─────",
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" ┌───┐",
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"q_1: ┤ X ├",
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" └───┘",
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"q_0: ─────",
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" ",
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]
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)
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result = visualization.circuit_drawer(circuit, reverse_bits=True)
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self.assertEqual(result.__str__(), expected)
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def test_no_explict_cregbundle(self):
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"""Test no explicit cregbundle should not raise warnings about being disabled
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See: https://github.com/Qiskit/qiskit-terra/issues/8690"""
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inner = QuantumCircuit(1, 1, name="inner")
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inner.measure(0, 0)
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circuit = QuantumCircuit(2, 2)
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circuit.append(inner, [0], [0])
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expected = "\n".join(
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[
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" ┌────────┐",
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"q_0: ┤0 ├",
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" │ │",
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"q_1: ┤ inner ├",
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" │ │",
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"c_0: ╡0 ╞",
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" └────────┘",
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"c_1: ══════════",
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" ",
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]
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)
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result = visualization.circuit_drawer(circuit)
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self.assertEqual(result.__str__(), expected)
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@ -5076,7 +5076,7 @@ class TestTextPhase(QiskitTestCase):
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crx = ClassicalRegister(2, "crx")
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crx = ClassicalRegister(2, "crx")
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circuit = QuantumCircuit(qrx, [Qubit(), Qubit()], qry, [Clbit(), Clbit()], crx)
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circuit = QuantumCircuit(qrx, [Qubit(), Qubit()], qry, [Clbit(), Clbit()], crx)
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self.assertEqual(circuit.draw(output="text").single_string(), expected)
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self.assertEqual(circuit.draw(output="text", cregbundle=True).single_string(), expected)
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class TestCircuitVisualizationImplementation(QiskitVisualizationTestCase):
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class TestCircuitVisualizationImplementation(QiskitVisualizationTestCase):
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