124 lines
5.4 KiB
Plaintext
124 lines
5.4 KiB
Plaintext
---
|
||
title: ConstrainedReschedule
|
||
description: API reference for qiskit.transpiler.passes.ConstrainedReschedule
|
||
in_page_toc_min_heading_level: 1
|
||
python_api_type: class
|
||
python_api_name: qiskit.transpiler.passes.ConstrainedReschedule
|
||
---
|
||
|
||
# ConstrainedReschedule
|
||
|
||
<Class id="qiskit.transpiler.passes.ConstrainedReschedule" isDedicatedPage={true} github="https://github.com/qiskit/qiskit/tree/stable/0.20/qiskit/transpiler/passes/scheduling/alignments/reschedule.py" signature="ConstrainedReschedule(acquire_alignment=1, pulse_alignment=1)" modifiers="class">
|
||
Bases: `qiskit.transpiler.basepasses.AnalysisPass`
|
||
|
||
Rescheduler pass that updates node start times to conform to the hardware alignments.
|
||
|
||
This pass shifts DAG node start times previously scheduled with one of the scheduling passes, e.g. [`ASAPSchedule`](qiskit.transpiler.passes.ASAPSchedule "qiskit.transpiler.passes.ASAPSchedule") or [`ALAPSchedule`](qiskit.transpiler.passes.ALAPSchedule "qiskit.transpiler.passes.ALAPSchedule"), so that every instruction start time satisfies alignment constraints.
|
||
|
||
**Examples**
|
||
|
||
We assume executing the following circuit on a backend with 16 dt of acquire alignment.
|
||
|
||
```python
|
||
┌───┐┌────────────────┐┌─┐
|
||
q_0: ┤ X ├┤ Delay(100[dt]) ├┤M├
|
||
└───┘└────────────────┘└╥┘
|
||
c: 1/════════════════════════╩═
|
||
0
|
||
```
|
||
|
||
Note that delay of 100 dt induces a misalignment of 4 dt at the measurement. This pass appends an extra 12 dt time shift to the input circuit.
|
||
|
||
```python
|
||
┌───┐┌────────────────┐┌─┐
|
||
q_0: ┤ X ├┤ Delay(112[dt]) ├┤M├
|
||
└───┘└────────────────┘└╥┘
|
||
c: 1/════════════════════════╩═
|
||
0
|
||
```
|
||
|
||
**Notes**
|
||
|
||
Your backend may execute circuits violating these alignment constraints. However, you may obtain erroneous measurement result because of the untracked phase originating in the instruction misalignment.
|
||
|
||
Create new rescheduler pass.
|
||
|
||
The alignment values depend on the control electronics of your quantum processor.
|
||
|
||
**Parameters**
|
||
|
||
* **acquire\_alignment** (`int`) – Integer number representing the minimum time resolution to trigger acquisition instruction in units of `dt`.
|
||
* **pulse\_alignment** (`int`) – Integer number representing the minimum time resolution to trigger gate instruction in units of `dt`.
|
||
|
||
## Methods
|
||
|
||
### name
|
||
|
||
<Function id="qiskit.transpiler.passes.ConstrainedReschedule.name" signature="ConstrainedReschedule.name()">
|
||
Return the name of the pass.
|
||
</Function>
|
||
|
||
### run
|
||
|
||
<Function id="qiskit.transpiler.passes.ConstrainedReschedule.run" signature="ConstrainedReschedule.run(dag)">
|
||
Run rescheduler.
|
||
|
||
This pass should perform rescheduling to satisfy:
|
||
|
||
> * All DAGOpNode are placed at start time satisfying hardware alignment constraints.
|
||
> * The end time of current does not overlap with the start time of successor nodes.
|
||
> * Compiler directives are not necessary satisfying the constraints.
|
||
|
||
Assumptions:
|
||
|
||
> * Topological order and absolute time order of DAGOpNode are consistent.
|
||
> * All bits in either qargs or cargs associated with node synchronously start.
|
||
> * Start time of qargs and cargs may different due to I/O latency.
|
||
|
||
Based on the configurations above, rescheduler pass takes following strategy.
|
||
|
||
1. #### Scan node from the beginning, i.e. from left of the circuit. The rescheduler
|
||
|
||
calls `node_start_time` from the property set, and retrieves the scheduled start time of current node.
|
||
|
||
2. #### If the start time of the node violates the alignment constraints,
|
||
|
||
the scheduler increases the start time until it satisfies the constraint.
|
||
|
||
3. #### Check overlap with successor nodes. If any overlap occurs, the rescheduler
|
||
|
||
recursively pushs the successor nodes backward towards the end of the wire. Note that shifted location doesn’t need to satisfy the constraints, thus it will be a minimum delay to resolve the overlap with the ancestor node.
|
||
|
||
4. #### Repeat 1-3 until the node at the end of the wire. This will resolve
|
||
|
||
all misalignment without creating overlap between the nodes.
|
||
|
||
**Parameters**
|
||
|
||
**dag** (`DAGCircuit`) – DAG circuit to be rescheduled with constraints.
|
||
|
||
**Raises**
|
||
|
||
[**TranspilerError**](qiskit.transpiler.TranspilerError "qiskit.transpiler.TranspilerError") – If circuit is not scheduled.
|
||
</Function>
|
||
|
||
## Attributes
|
||
|
||
### is\_analysis\_pass
|
||
|
||
<Attribute id="qiskit.transpiler.passes.ConstrainedReschedule.is_analysis_pass">
|
||
Check if the pass is an analysis pass.
|
||
|
||
If the pass is an AnalysisPass, that means that the pass can analyze the DAG and write the results of that analysis in the property set. Modifications on the DAG are not allowed by this kind of pass.
|
||
</Attribute>
|
||
|
||
### is\_transformation\_pass
|
||
|
||
<Attribute id="qiskit.transpiler.passes.ConstrainedReschedule.is_transformation_pass">
|
||
Check if the pass is a transformation pass.
|
||
|
||
If the pass is a TransformationPass, that means that the pass can manipulate the DAG, but cannot modify the property set (but it can be read).
|
||
</Attribute>
|
||
</Class>
|
||
|