From f19d504c88af3c0eeb8e916e49896c6b02ed5e9b Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Fri, 25 Nov 2016 01:50:01 -0800 Subject: [PATCH] Use % in makefrag-verilog to prevent double firrtl execution (#452) * Use % in makefrag-verilog to prevent double firrtl execution --- vsim/Makefrag-verilog | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/vsim/Makefrag-verilog b/vsim/Makefrag-verilog index 953bff80..cedceada 100644 --- a/vsim/Makefrag-verilog +++ b/vsim/Makefrag-verilog @@ -12,9 +12,9 @@ $(generated_dir)/%.fir $(generated_dir)/%.prm $(generated_dir)/%.d: $(FIRRTL_JAR mkdir -p $(dir $@) cd $(base_dir) && $(SBT) "run-main $(PROJECT).Generator $(generated_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)" -$(generated_dir)/$(long_name).v $(generated_dir)/$(long_name).conf : $(firrtl) $(FIRRTL_JAR) +$(generated_dir)/%.v $(generated_dir)/%.conf: $(generated_dir)/%.fir $(FIRRTL_JAR) mkdir -p $(dir $@) - $(FIRRTL) -i $< -o $(generated_dir)/$(long_name).v -X verilog --infer-rw $(MODEL) --repl-seq-mem -c:$(MODEL):-o:$(generated_dir)/$(long_name).conf + $(FIRRTL) -i $< -o $(generated_dir)/$*.v -X verilog --infer-rw $(MODEL) --repl-seq-mem -c:$(MODEL):-o:$(generated_dir)/$*.conf $(generated_dir)/$(long_name).behav_srams.v : $(generated_dir)/$(long_name).conf $(mem_gen) cd $(generated_dir) && \