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Update README.md (#748)

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Henry Cook 2017-05-17 14:53:56 -07:00 committed by GitHub
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Rocket Chip Generator [![Build Status](https://travis-ci.org/ucb-bar/rocket-chip.svg?branch=master)](https://travis-ci.org/ucb-bar/rocket-chip) Rocket Chip Generator :rocket: [![Build Status](https://travis-ci.org/freechipsproject/rocket-chip.svg?branch=master)](https://travis-ci.org/freechipsproject/rocket-chip)
===================== =====================
This repository contains the Rocket chip generator necessary to instantiate This repository contains the Rocket chip generator necessary to instantiate
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* **groundtest** * **groundtest**
This RTL package generates synthesizeable hardware testers that emit randomized This RTL package generates synthesizeable hardware testers that emit randomized
memory access streams in order to stress-tests the uncore memory hierarchy. memory access streams in order to stress-tests the uncore memory hierarchy.
* **junctions** * **jtag**
This RTL package provides definitions for bus interfaces and generates a variety of protocol converters. This RTL package provides definitions for generating JTAG bus interfaces.
* **regmapper** * **regmapper**
This utility package generates slave devices with a standardized interface for accessing their memory-mapped registers. This utility package generates slave devices with a standardized interface for accessing their memory-mapped registers.
* **rocket** * **rocket**