2017-03-27 15:01:05 +08:00
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#define DRAM_BASE 0x80000000
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2017-03-25 06:55:57 +08:00
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.section .text.start, "ax", @progbits
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.globl _start
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2016-08-06 02:07:42 +08:00
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_start:
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2018-09-30 10:59:53 +08:00
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csrwi 0x7c1, 0 // disable chicken bits
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2017-03-27 15:01:05 +08:00
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li s0, DRAM_BASE
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2017-03-25 06:55:57 +08:00
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csrr a0, mhartid
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la a1, _dtb
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jr s0
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.section .text.hang, "ax", @progbits
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.globl _hang
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_hang:
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2018-09-30 10:59:53 +08:00
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csrwi 0x7c1, 0 // disable chicken bits
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2017-03-27 15:01:05 +08:00
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csrr a0, mhartid
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la a1, _dtb
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2018-09-28 08:06:03 +08:00
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csrwi mie, 0
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2017-03-27 15:01:05 +08:00
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1:
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2017-03-25 06:55:57 +08:00
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wfi
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2017-03-27 15:01:05 +08:00
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j 1b
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2017-03-25 06:55:57 +08:00
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.section .rodata.dtb, "a", @progbits
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.globl _dtb
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.align 5, 0
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_dtb:
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.ascii "DTB goes here"
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