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hqjenny-chipyard
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allow rocket builds | asm tests pass

This commit is contained in:
abejgonzalez 2019-04-23 11:50:36 -07:00
parent c1a0916e40
commit 862c217ff4
3 changed files with 23 additions and 4 deletions
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12
build.sbt
View File

@ -24,10 +24,14 @@ lazy val rebarFirrtl = (project in file("tools/firrtl"))
lazy val rocketchip = RootProject(file("generators/rocket-chip"))
lazy val testchipip = (project in file("generators/testchipip"))
lazy val rebarrocketchip = project
.dependsOn(rocketchip)
.settings(commonSettings)
lazy val testchipip = (project in file("generators/testchipip"))
.dependsOn(rebarrocketchip)
.settings(commonSettings)
// Checks for -DROCKET_USE_MAVEN.
// If it's there, use a maven dependency.
// Else, depend on subprojects in git submodules.
@ -46,7 +50,7 @@ lazy val example = conditionalDependsOn(project in file("."))
.settings(commonSettings)
lazy val boom = (project in file("generators/boom"))
.dependsOn(rocketchip)
.dependsOn(rebarrocketchip)
.settings(commonSettings)
lazy val tapeout = conditionalDependsOn(project in file("./tools/barstools/tapeout/"))
@ -57,10 +61,10 @@ lazy val mdf = (project in file("./tools/barstools/mdf/scalalib/"))
.settings(commonSettings)
lazy val `barstools-macros` = (project in file("./tools/barstools/macros/"))
.dependsOn(mdf, rocketchip, rebarFirrtl)
.dependsOn(mdf, rebarrocketchip, rebarFirrtl)
.enablePlugins(sbtassembly.AssemblyPlugin)
.settings(commonSettings)
lazy val sifive_blocks = (project in file("generators/sifive-blocks"))
.dependsOn(rocketchip)
.dependsOn(rebarrocketchip)
.settings(commonSettings)

1
src/main/scala/example/Simulator.scala
View File

@ -102,6 +102,7 @@ object GenerateSimFiles extends App with HasGenerateSimConfig {
firrtl.FileUtils.makeDirectory("./bootrom/")
writeResource("/testchipip/bootrom/bootrom.rv64.img", "./bootrom/")
writeResource("/testchipip/bootrom/bootrom.rv32.img", "./bootrom/")
writeResource("/project-template/bootrom/bootrom.img", "./bootrom/")
}
def writeFiles(cfg: GenerateSimConfig): Unit = {

14
variables.mk
View File

@ -42,6 +42,15 @@ ifeq ($(SUB_PROJECT),boom)
SBT_PROJECT=boom
TOP=ExampleBoomSystem
endif
ifeq ($(SUB_PROJECT),rocketchip)
# for Rocket-chip developers
PROJECT=freechips.rocketchip.system
MODEL=TestHarness
CONFIG=DefaultConfig
CFG_PROJECT=freechips.rocketchip.system
SBT_PROJECT=rebarrocketchip
TOP=ExampleRocketSystem
endif
#########################################################################################
# path to rocket-chip and testchipip
@ -55,6 +64,11 @@ REBAR_FIRRTL_DIR = $(base_dir)/tools/firrtl
#########################################################################################
long_name = $(PROJECT).$(MODEL).$(CONFIG)
# if building from rocketchip, override the long_name to match what they expect
ifeq ($(SBT_PROJECT),rebarrocketchip)
long_name=$(PROJECT).$(CONFIG)
endif
FIRRTL_FILE ?= $(build_dir)/$(long_name).fir
ANNO_FILE ?= $(build_dir)/$(long_name).anno.json
VERILOG_FILE ?= $(build_dir)/$(long_name).top.v