110 lines
4.4 KiB
Markdown
110 lines
4.4 KiB
Markdown
# Centrifuge - A Unified Approach to Generate RISC-V Accelerator SoC
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## 1. Centrifuge Setup
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1) Set up the Chipyard repo. For more Chipyard related info,
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please refer to the Chipyard Tutorial (https://chipyard.readthedocs.io/en/latest/)
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```
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git clone https://github.com/hqjenny/chipyard.git
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cd chipyard
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./scripts/init-submodules-no-riscv-tools.sh
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./scripts/build-toolchains.sh #
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source ./scripts/env.sh
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```
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2) (OPTIONAL for FPGA-accelerated simulation) Set up the FireSim repo.
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For more FireSim related info, please refer to FireSim’s documentation (https://docs.fires.im/en/latest/index.html).
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For using FireSim in Chipyard, refer to (https://chipyard.readthedocs.io/en/latest/Simulation/FPGA-Accelerated-Simulation.html).
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```
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./scripts/firesim-setup.sh --fast
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pushd sims/firesim
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source sourceme-f1-manager.sh
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popd
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```
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3) Set up the Centrifuge dependencies.
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This sets up the required scripting packages and applies patches to existing tools.
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```
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./tools/centrifuge/scripts/hls-setup.sh
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```
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## 2. Running Centrifuge
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1) Before running Centrifuge, source the env setup scripts.
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It sets an environmental variable `RDIR` to the root directory of the Chipyard, which we used to construct paths in the scritps.
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```
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source tools/centrifuge/env.sh
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```
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### 2.1 Vector Add Example
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1) Source code format
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2) Configuration format
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3) Run Centrifuge to generate the accelerator SoC defined in `accel.json`.
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```
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cd $RDIR/tools/centrifuge/scripts
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perl generate_soc.pl accel.json accel
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```
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This also generates the sw helper functions to invoke the accelerator. The generated sw wrapper `accel_wrapper.c` and `accel_wrapper.h`is under the hardware path `$RDIR/generators/accel/hls_vadd_tl_vadd/src/main/c`. The makefile for baremetal is compilation
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is copied to `$RDIR/generators/accel/Makefile.bm.in`. The makefile for linux is copied to `$RDIR/generators/accel/Makefile.gcc.in`. The postfix of the bare-metal program is `.bm.rv` and `.bm_accel.rv`
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for programs with or without using the accelerator. Run `make` will generate both, while `make accel` generates only `.bm_accel.rv`. The postfix of generated linux program is `.rv`.
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4) Software Compilation
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Run the following command to invoke compilation for bare-metal.
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```
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perl generate_soc.pl accel.json compile_sw_bm
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```
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We currently
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5) Run VCS/Verilator Simulation
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To run VCS simulation,
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```
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perl generate_soc.pl accel.json run_vcs
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```
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Replace `run_vcs` with `run_verilator` for Verilator runs.
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This command generates a simulation executable called `simv-example-HLSRocketConfig-debug` under `$RDIR/sims/vcs/`.
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This executable is a simulator that has been compiled based on the design that was built.
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You can then use this executable to run any compatible RV64 code.
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For instance, to invoke the accelerator in bare-metal software, run:
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```
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cd $RDIR/sims/vcs/
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./simv-example-HLSRocketConfig-debug $RDIR/generators/accel/hls_vadd_tl_vadd/src/main/c/vadd_tl.bm_accel.rv
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```
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5) Run FPGA Simulation
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a) Following the FireSim instrucitons to set up the manager instance here
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(https://docs.fires.im/en/latest/Initial-Setup/Setting-up-your-Manager-Instance.html).
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Commands `aws configure` and `firesim managerinit` should be run for the setup.
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Then the user should set up S3 buckets name in `$RDIR/sims/firesim/deploy/config_build.ini`
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following the instructions here (https://docs.fires.im/en/latest/Building-a-FireSim-AFI.html).
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b) Generate FireSim Image
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First, run the following command to generate a new accelerator configuration in FireSim with `DESIGN=FireSimTopWithHLS`, `TARGET_CONFIG=HLSFireSimRocketChipConfig` and `PLATFORM_CONFIG=BaseF1Config_F90MHz`:
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```
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perl generate_soc.pl accel.json f1_scripts
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```
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This commmand also sets up custom F1 scripts to compile the design with accelerators.
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Then we need configure the FireSim build receipes.
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First, append the following build recipes to the `$RDIR/sims/firesim/deploy/config_build_recipes.ini`
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```
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[firesimhls-singlecore-no-nic-l2-lbp]
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DESIGN=FireSimTopWithHLSNoNIC
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TARGET_CONFIG=HLSFireSimRocketChipConfig
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PLATFORM_CONFIG=BaseF1Config_F90MHz
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instancetype=c5.4xlarge
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deploytriplet=None
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```
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Then, add `firesimhls-singlecore-no-nic-l2-lbp` to the `[builds]` and `[agfistoshare]` sections in file
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`$RDIR/sims/firesim/deploy/config_build.ini`.
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Lastly, run `firesim buildafi` to start building the FPGA image.
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To understand how FireSim manager works, please refer to (https://docs.fires.im/en/latest/Building-a-FireSim-AFI.html)
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d) Run Baremetal SW
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e) Run Linux SW
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