a3047c5763 | ||
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examples | ||
patches | ||
scripts | ||
workloads | ||
.gitignore | ||
.gitmodules | ||
README.md | ||
env.sh |
README.md
Centrifuge - A Unified Approach to Generate RISC-V Accelerator SoC
1. Chipyard and FireSim Setup
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Set up AWS machine following Firesim Setting up your Manager Instance
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Before initializing Chipyard, enable make/gcc 4.x.x
source scl_source enable devtoolset-8
- Follow Chipyard Tutorial Quick Start and FireSim FPGA-Accelerated-Simulation
git clone https://github.com/ucb-bar/chipyard.git
cd chipyard
./scripts/init-submodules-no-riscv-tools.sh
./scripts/build-toolchains.sh
source ./scripts/env.sh
./scripts/firesim-setup.sh --fast
cd sims/firesim
source sourceme-f1-manager.sh
- Generate the accelerator SoC defined in
accel.json
cd tools/centrifuge/scripts
source hls-setup.sh
perl generate_soc.pl accel.json
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Run Verilator Simulation
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Generate FireSim Image