Add generate build sbt script; renam run_chisel script

This commit is contained in:
Jenny Huang 2020-03-18 04:20:45 -07:00
parent 987f0b3e9a
commit c02423b576
5 changed files with 275 additions and 5 deletions

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@ -1,3 +1,4 @@
from .generate_hw import generate_hw
from .run_hls import run_hls
from .run_chisel import run_chisel
from .generate_chisel import generate_chisel
from .generate_build_sbt import generate_build_sbt

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@ -0,0 +1,57 @@
import pathlib
import shutil
from .. import util
import collections
import logging
import argparse
from string import Template
import re
logger = logging.getLogger(__name__)
logger.setLevel(logging.DEBUG)
def generate_build_sbt(accel_conf):
logger.info("Generating build.sbt file ...")
accel_template = Template("""
lazy val ${ACCEL_NAME} = conditionalDependsOn(project in file("generators/${ACCEL_NAME}"))
.dependsOn(boom, hwacha, sifive_blocks, sifive_cache, utilities${BMS})
.settings(commonSettings)
""")
bm_template = Template("""
lazy val ${BM} = (project in file("${DIR}"))
.dependsOn(rocketchip, testchipip, midasTargetUtils, icenet)
.settings(commonSettings)
""")
accel_config_str = ""
bms_str = ""
for accel in accel_conf.rocc_accels + accel_conf.tl_accels:
d = {'BM': 'hls_' + accel.name, 'DIR': accel.dir}
bms_str += ", hls_"+ accel.name
accel_config_str += bm_template.substitute(d)
d = {'ACCEL_NAME': accel_conf.accel_name, 'BMS': bms_str}
accel_config_str += accel_template.substitute(d)
template_dir = util.getOpt('template-dir')
template_name = 'build_sbt_template'
with open (template_dir / template_name, 'r') as f:
template_str= f.read()
t = Template(template_str)
config_dict = {
'HLS_ACCEL_NAME': accel_conf.accel_name,
'HLS_ACCEL_CONFIG': accel_config_str
}
tl_build_sbt_str = t.substitute(config_dict)
chipyard_dir = util.getOpt('chipyard-dir')
sbt_path = chipyard_dir / 'build.sbt'
logger.info("\t\tGenerate build.sbt: {}".format(sbt_path))
with open(sbt_path,'w') as f:
f.write(tl_build_sbt_str)

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@ -1,4 +1,3 @@
#from generate_wrapper import parse_verilog_rocc, parse_verilog_tl
import pathlib
import shutil
import collections
@ -773,7 +772,7 @@ def generate_chisel_tl(func, idx, inputs, outputs, params, buses, scala_dir, tem
with open(scala_path,'w') as f:
f.write(tl_accel_scala_str)
def run_chisel(accel_conf):
def generate_chisel(accel_conf):
from .. import util
template_dir = util.getOpt('template-dir')
for accel in accel_conf.rocc_accels:

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@ -10,7 +10,8 @@ import errno
from .. import util
from string import Template
from . import run_hls
from . import run_chisel
from . import generate_chisel
from . import generate_build_sbt
logger = logging.getLogger(__name__)
logger.setLevel(logging.NOTSET)
@ -52,7 +53,8 @@ def generate_hw(accel_conf):
logger.info("Initialize Generated Hardware Repository {}".format(accel_conf.hw_accel_dir))
init_accel(accel_conf)
run_hls.run_hls(accel_conf)
run_chisel.run_chisel(accel_conf)
generate_chisel.generate_chisel(accel_conf)
generate_build_sbt.generate_build_sbt(accel_conf)
def clean_hw(accel_conf):

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@ -0,0 +1,211 @@
import Tests._
// This gives us a nicer handle to the root project instead of using the
// implicit one
lazy val chipyardRoot = RootProject(file("."))
lazy val commonSettings = Seq(
organization := "edu.berkeley.cs",
version := "1.0",
scalaVersion := "2.12.10",
traceLevel := 15,
test in assembly := {},
assemblyMergeStrategy in assembly := { _ match {
case PathList("META-INF", "MANIFEST.MF") => MergeStrategy.discard
case _ => MergeStrategy.first}},
scalacOptions ++= Seq("-deprecation","-unchecked","-Xsource:2.11"),
libraryDependencies += "org.scalatest" %% "scalatest" % "3.0.8" % "test",
libraryDependencies += "org.json4s" %% "json4s-jackson" % "3.6.1",
libraryDependencies += "org.scala-lang" % "scala-reflect" % scalaVersion.value,
libraryDependencies += "com.github.scopt" %% "scopt" % "3.7.0",
libraryDependencies += "org.scala-lang.modules" % "scala-jline" % "2.12.1",
libraryDependencies += "com.typesafe.play" %% "play-json" % "2.6.10",
addCompilerPlugin("org.scalamacros" % "paradise" % "2.1.0" cross CrossVersion.full),
unmanagedBase := (chipyardRoot / unmanagedBase).value,
allDependencies := allDependencies.value.filterNot(_.organization == "edu.berkeley.cs"),
exportJars := true,
resolvers ++= Seq(
Resolver.sonatypeRepo("snapshots"),
Resolver.sonatypeRepo("releases"),
Resolver.mavenLocal))
val rocketChipDir = file("generators/rocket-chip")
lazy val firesimAsLibrary = sys.env.get("FIRESIM_STANDALONE") == None
lazy val firesimDir = if (firesimAsLibrary) {
file("sims/firesim/sim/")
} else {
file("../../sim")
}
// Checks for -DROCKET_USE_MAVEN.
// If it's there, use a maven dependency.
// Else, depend on subprojects in git submodules.
def conditionalDependsOn(prj: Project): Project = {
if (sys.props.contains("ROCKET_USE_MAVEN")) {
prj.settings(Seq(
libraryDependencies += "edu.berkeley.cs" %% "testchipip" % "1.0-020719-SNAPSHOT",
))
} else {
prj.dependsOn(testchipip)
}
}
/**
* It has been a struggle for us to override settings in subprojects.
* An example would be adding a dependency to rocketchip on midas's targetutils library,
* or replacing dsptools's maven dependency on chisel with the local chisel project.
*
* This function works around this by specifying the project's root at src/ and overriding
* scalaSource and resourceDirectory.
*/
def freshProject(name: String, dir: File): Project = {
Project(id = name, base = dir / "src")
.settings(
scalaSource in Compile := baseDirectory.value / "main" / "scala",
resourceDirectory in Compile := baseDirectory.value / "main" / "resources"
)
}
// Fork each scala test for now, to work around persistent mutable state
// in Rocket-Chip based generators
def isolateAllTests(tests: Seq[TestDefinition]) = tests map { test =>
val options = ForkOptions()
new Group(test.name, Seq(test), SubProcess(options))
} toSeq
// Subproject definitions begin
//
// FIRRTL is handled as an unmanaged dependency. Make will build the firrtl jar
// before launching sbt if any of the firrtl source files has been updated
// The jar is dropped in chipyard's lib/ directory, which is used as the unmanagedBase
// for all subprojects
lazy val chisel = (project in file("tools/chisel3"))
lazy val firrtl_interpreter = (project in file("tools/firrtl-interpreter"))
.settings(commonSettings)
lazy val treadle = (project in file("tools/treadle"))
.settings(commonSettings)
lazy val chisel_testers = (project in file("tools/chisel-testers"))
.dependsOn(chisel, firrtl_interpreter, treadle)
.settings(
commonSettings,
libraryDependencies ++= Seq(
"junit" % "junit" % "4.12",
"org.scalatest" %% "scalatest" % "3.0.5",
"org.scalacheck" %% "scalacheck" % "1.14.0",
"com.github.scopt" %% "scopt" % "3.7.0"
)
)
// Contains annotations & firrtl passes you may wish to use in rocket-chip without
// introducing a circular dependency between RC and MIDAS
lazy val midasTargetUtils = ProjectRef(firesimDir, "targetutils")
// Rocket-chip dependencies (subsumes making RC a RootProject)
lazy val hardfloat = (project in rocketChipDir / "hardfloat")
.settings(commonSettings).dependsOn(midasTargetUtils)
lazy val rocketMacros = (project in rocketChipDir / "macros")
.settings(commonSettings)
lazy val rocketConfig = (project in rocketChipDir / "api-config-chipsalliance/build-rules/sbt")
.settings(commonSettings)
lazy val rocketchip = freshProject("rocketchip", rocketChipDir)
.settings(commonSettings)
.dependsOn(chisel, hardfloat, rocketMacros, rocketConfig)
lazy val testchipip = (project in file("generators/testchipip"))
.dependsOn(rocketchip, sifive_blocks)
.settings(commonSettings)
lazy val chipyard = conditionalDependsOn(project in file("generators/chipyard"))
.dependsOn(boom, hwacha, sifive_blocks, sifive_cache, utilities,
sha3, // On separate line to allow for cleaner tutorial-setup patches
${HLS_ACCEL_NAME} // HLS generated accelerators
gemmini, icenet, tracegen, ariane)
.settings(commonSettings)
lazy val tracegen = conditionalDependsOn(project in file("generators/tracegen"))
.dependsOn(rocketchip, sifive_cache, boom, utilities)
.settings(commonSettings)
lazy val utilities = conditionalDependsOn(project in file("generators/utilities"))
.settings(commonSettings)
lazy val icenet = (project in file("generators/icenet"))
.dependsOn(rocketchip, testchipip)
.settings(commonSettings)
lazy val hwacha = (project in file("generators/hwacha"))
.dependsOn(rocketchip)
.settings(commonSettings)
lazy val boom = (project in file("generators/boom"))
.dependsOn(rocketchip)
.settings(commonSettings)
lazy val ariane = (project in file("generators/ariane"))
.dependsOn(rocketchip)
.settings(commonSettings)
lazy val sha3 = (project in file("generators/sha3"))
.dependsOn(rocketchip, chisel_testers, midasTargetUtils)
.settings(commonSettings)
lazy val gemmini = (project in file("generators/gemmini"))
.dependsOn(rocketchip, chisel_testers, testchipip)
.settings(commonSettings)
lazy val tapeout = conditionalDependsOn(project in file("./tools/barstools/tapeout/"))
.dependsOn(chisel_testers, chipyard)
.settings(commonSettings)
lazy val mdf = (project in file("./tools/barstools/mdf/scalalib/"))
.settings(commonSettings)
lazy val barstoolsMacros = (project in file("./tools/barstools/macros/"))
.dependsOn(firrtl_interpreter, mdf, rocketchip)
.enablePlugins(sbtassembly.AssemblyPlugin)
.settings(commonSettings)
lazy val dsptools = (project in file("./tools/dsptools"))
.dependsOn(chisel, chisel_testers)
.settings(
commonSettings,
libraryDependencies ++= Seq(
"org.typelevel" %% "spire" % "0.14.1",
"org.scalanlp" %% "breeze" % "0.13.2",
"junit" % "junit" % "4.12" % "test",
"org.scalatest" %% "scalatest" % "3.0.5" % "test",
"org.scalacheck" %% "scalacheck" % "1.14.0" % "test"
))
lazy val `rocket-dsptools` = (project in file("./tools/dsptools/rocket"))
.dependsOn(rocketchip, dsptools)
.settings(commonSettings)
lazy val sifive_blocks = (project in file("generators/sifive-blocks"))
.dependsOn(rocketchip)
.settings(commonSettings)
lazy val sifive_cache = (project in file("generators/sifive-cache")).settings(
commonSettings,
scalaSource in Compile := baseDirectory.value / "design/craft"
).dependsOn(rocketchip)
// Library components of FireSim
lazy val midas = ProjectRef(firesimDir, "midas")
lazy val firesimLib = ProjectRef(firesimDir, "firesimLib")
lazy val firechip = conditionalDependsOn(project in file("generators/firechip"))
.dependsOn(chipyard, midasTargetUtils, midas, firesimLib % "test->test;compile->compile")
.settings(
commonSettings,
testGrouping in Test := isolateAllTests( (definedTests in Test).value )
)
${HLS_ACCEL_CONFIG}