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README.md
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README.md
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# Centrifuge - A Unified Approach to Generate RISC-V Accelerator SoC
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## 1. Chipyard and FireSim Setup
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1) Set up AWS machine following Firesim [Setting up your Manager Instance](https://docs.fires.im/en/latest/Initial-Setup/Setting-up-your-Manager-Instance.html)
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2) Before initializing Chipyard, enable make/gcc 4.x.x
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## 1. Centrifuge Setup
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1) Set up the Chipyard repo. For more Chipyard related info,
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please refer to the Chipyard Tutorial (https://chipyard.readthedocs.io/en/latest/)
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```
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source scl_source enable devtoolset-8
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```
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3) Follow Chipyard Tutorial [Quick Start](https://chipyard.readthedocs.io/en/latest/)
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and FireSim [FPGA-Accelerated-Simulation](https://chipyard.readthedocs.io/en/latest/Simulation/FPGA-Accelerated-Simulation.html)
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```
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git clone https://github.com/ucb-bar/chipyard.git
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git clone https://github.com/hqjenny/chipyard.git
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cd chipyard
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./scripts/init-submodules-no-riscv-tools.sh
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./scripts/build-toolchains.sh
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./scripts/build-toolchains.sh #
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source ./scripts/env.sh
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```
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2) (OPTIONAL for FPGA-accelerated simulation) Set up the FireSim repo.
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For more FireSim related info, please refer to FireSim’s documentation (https://docs.fires.im/en/latest/index.html).
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For using FireSim in Chipyard, refer to (https://chipyard.readthedocs.io/en/latest/Simulation/FPGA-Accelerated-Simulation.html).
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```
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./scripts/firesim-setup.sh --fast
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cd sims/firesim
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pushd sims/firesim
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source sourceme-f1-manager.sh
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popd
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```
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Also the Centrifuge dependencies
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3) Set up the Centrifuge dependencies.
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This sets up the required scripting packages and applies patches to existing tools.
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```
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cd ../../
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source tools/centrifuge/scripts/source hls-setup.sh
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```
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4) Generate the accelerator SoC defined in `accel.json`
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## 2. Running Centrifuge
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1) Before running Centrifuge, source the env setup scripts.
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It sets an environmental variable `RDIR` to the root directory of the Chipyard, which we used to construct paths in the scritps.
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```
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cd tools/centrifuge/scripts
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source envs.sh # Set the RDIR to the Chipyard root directory
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source tools/centrifuge/env.sh
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```
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### 2.1 Vector Add Example
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1) Source code format
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2) Configuration format
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3) Run Centrifuge to generate the accelerator SoC defined in `accel.json`.
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```
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cd $RDIR/tools/centrifuge/scripts
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perl generate_soc.pl accel.json accel
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```
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5) The generated sw wrapper `accel_wrapper.c` abd `accel_wrapper.h`is under the hardware path `$RDIR/generators/accel/hls_vadd_tl_vadd/src/main/c`. The makefile for baremetal is compilation
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The generated sw wrapper `accel_wrapper.c` and `accel_wrapper.h`is under the hardware path `$RDIR/generators/accel/hls_vadd_tl_vadd/src/main/c`. The makefile for baremetal is compilation
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is copied to `$RDIR/generators/accel/Makefile.bm.in`. The makefile for linux is copied to `$RDIR/generators/accel/Makefile.gcc.in`. The postfix of the bare-metal program is `.bm.rv` and `.bm_accel.rv`
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for programs with or without using the accelerator. Run `make` will generate both, while `make accel` generates only `.bm_accel.rv`.
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for programs with or without using the accelerator. Run `make` will generate both, while `make accel` generates only `.bm_accel.rv`. The postfix of generated linux program is `.rv`.
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The postfix of generated linux program is `.rv`.
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Run Verilator Simulation
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6) Generate FireSim Image
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4) Run VCS/Verilator Simulation
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4.1) Run Baremetal SW
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5) Run FPGA Simulation
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5.1) Generate FireSim Image
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5.2) Run Baremetal SW
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5.3) Run Linux SW
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