Hanchen Ye
a033ec2640
update README; update polybench C test cases
2021-08-23 16:16:20 -05:00
Hanchen Ye
96975c1ae1
remove llvm submodule
2021-08-23 13:31:43 -05:00
Hanchen Ye
9825bcd3ca
remove SCF2Affine conversion passes
2021-08-23 13:30:36 -05:00
Hanchen Ye
6fae37ca77
using llvm-project of Polygeist
2021-08-23 13:26:18 -05:00
Hanchen Ye
a7dc320d2c
add Polygeist submodule
2021-08-23 11:51:18 -05:00
Hanchen Ye
c5f894dd08
[scalehls-clang] Update test cases; [SCFToAffine] Solve an issue when loop bound is induction variable
2021-08-11 22:29:30 -05:00
Hanchen Ye
8d98a6120b
[scalehls-clang] Add several test cases
2021-08-11 20:50:11 -05:00
Hanchen Ye
8e659ec991
Update README.md
2021-07-27 11:00:10 -07:00
Jianyi Cheng
5f430e18b7
Add SCFToAffine conversion pass ( #25 )
...
- Added two passes to raise scf dialect:
- Check whether each scf.for op can be raised to an affine.for op and raise it if it can.
- Check whether each memref.load/memref.store op can be raised to an affine.load/affine.store op and raise it if it can.
- Added a unit test for SCFToAffine
2021-07-03 01:39:31 -05:00
Hanchen Ye
b09c443110
update LLVM to c4c3869
2021-06-02 13:50:13 -05:00
Hanchen Ye
964c7315eb
[MultipleLevelDSE] start of supporting function pipelining; [Test] add gemm.c test case
2021-06-02 12:52:49 -05:00
Hanchen Ye
8f18e2f7b1
update LLVM to 39bbfb77264a4a7a216921c2b70a30ba0f27eb56
2021-05-06 19:13:52 -05:00
Hanchen Ye
78175259b5
[Readme] update install and scalehls-clang instructions
2021-05-01 01:28:38 -05:00
Hanchen Ye
c3deb43ee8
[Dialect] fix several bugs
2021-05-01 01:06:35 -05:00
Hanchen Ye
10179b4a8c
Merge pull request #24 from hanchenye/c-frontend
...
Added C frontend
2021-05-01 00:44:16 -05:00
Hanchen Ye
f907c9810a
[scalehls-clang] add syrk test case; update using llvm cl tools
2021-05-01 00:37:27 -05:00
Jianyi Cheng
9ac014900b
format
2021-04-30 23:54:57 +01:00
Jianyi Cheng
b46e871532
Move clang config to top
2021-04-30 23:25:37 +01:00
Jianyi Cheng
fd48c4cc5c
Added C front end
2021-04-30 23:23:12 +01:00
Jianyi Cheng
28c5594ce5
changed llvm branch to main
2021-04-30 19:53:51 +01:00
Hanchen Ye
671b4a9991
fix bugs in new LLVM version
2021-04-30 13:21:20 -05:00
Jianyi Cheng
2f9fcb8b4b
updated doc
2021-04-30 18:34:36 +01:00
Jianyi Cheng
5188529c85
Added llvm submodule
2021-04-30 17:57:24 +01:00
Hanchen Ye
a29153b510
[Readme] update references
2021-04-26 21:05:18 -05:00
Hanchen Ye
fb7728f060
[Readme] update readme for using instructions
2021-04-26 20:54:10 -05:00
Hanchen Ye
ab22a45c20
remove redundant includes
2021-04-21 22:20:37 -05:00
Hanchen Ye
3d1bcb906e
[MultipeLevelDSE, LoopPipeline] fix bugs; [QoREstimation] fix no_touch attribute support; [LegalizeToHLSCpp] split out callable API;
2021-04-21 21:59:47 -05:00
Hanchen Ye
6b0255366a
[Analysis] remove AnalysisBase class, update emitter, estimator, and optimizer accordingly; [MultipleLevelDSE] update with new attributes
2021-04-21 03:26:37 -05:00
Hanchen Ye
bb9ee6a5c2
[Transforms] update all directive transforms using new directive attributes; update test cases accordingly
2021-04-21 00:51:30 -05:00
Hanchen Ye
68b1895d31
[HLSCpp] update definition of attributes, hope this is the final version...; [LegalizeToHLSCpp, QoREstimation] update with new attributes
2021-04-21 00:29:52 -05:00
Hanchen Ye
cb2df2dc37
[HLSCpp] update ScheduleAttr to TimingAttr; [QoREstimation] using HLSCpp attribute for representing resource and timing annotations
2021-04-19 00:11:10 -05:00
Hanchen Ye
2fda888955
[HLSCpp] use ODS for the dialect declaration
2021-04-16 09:58:08 -05:00
Hanchen Ye
a26b6d0518
[HLSCpp] update all attributes; add attribute parser and printer; [QoREstimation] update with ScheduleAttr
2021-04-16 01:07:08 -05:00
Hanchen Ye
c798c28717
[HLSCpp] start to add structure attributes for representing directives, scheduling, and resource info
2021-04-15 14:12:46 -05:00
Hanchen Ye
debc934b1b
[Samples] add baseline and opt c++ files for all computation kernels and dnn models shown in the paper
2021-04-08 17:59:36 -05:00
Hanchen Ye
4a37ed13de
[QoREstimation] fixed a bug causing unaccurate estimation of syrk and syr2k; [Samples] update all testing scripts and samples
2021-04-07 22:44:38 -05:00
Hanchen Ye
d8420af618
[Samples] add mobilenet test case; split int and float ablation study
2021-04-07 18:17:13 -05:00
Hanchen Ye
d1786aeed7
[QuantizeOnnx] update the pass name
2021-04-06 20:35:32 -05:00
Hanchen Ye
74d0c13776
[EmitHLSCpp] emit int{n}_t instead of ap_int<{n}> for 8/16/32/64 bits int
2021-04-06 19:09:39 -05:00
Hanchen Ye
ea9467cfe5
[QuantizeDNNModel] add support of div op and some cast ops
2021-04-06 18:47:30 -05:00
Hanchen Ye
a5cd433029
[EmitHLSCpp] fix an error of EmitSelectOp; update from val{n} to v{n}
2021-04-06 18:25:45 -05:00
Hanchen Ye
d14f8718d0
[QuantizeDNNModel] impl this pass for quantizing onnx model to 8/32 bits representation; [HLSCpp] add MulOp and AddOp
2021-04-06 17:25:57 -05:00
Hanchen Ye
1c5e11940a
[Samples] update dse testing script
2021-04-02 23:54:28 -05:00
Hanchen Ye
d0b847c26a
[MultipleLevelDSE] support to specify the maximum exploration and loop parallelism; [Samples] add trmm test case, update the problem size of all benchmarks to 1024
2021-03-31 22:45:14 -05:00
Hanchen Ye
cd03a1def3
[MultipleLevelDSE] support to explore directive-only design space
2021-03-31 19:32:56 -05:00
Hanchen Ye
a9d93f0ed2
[MultipleLevelDSE] support to specify sample number; [EmitHLSCpp] stop to emit interface pragma if array is fully partitioned; [Samples] update polybench test script
2021-03-31 15:56:00 -05:00
Hanchen Ye
1d00ea9812
[ArrayPartition] fix a bug; add applyArrayPartition() to transform utils; [Samples] update dnn test target fpga
2021-03-30 15:54:53 -05:00
Hanchen Ye
6dc5b6785e
[Samples] update polybench dse and dnn ablation scripts
2021-03-29 23:56:35 -05:00
Hanchen Ye
affa783242
[EmitHLSCpp] when the array is fully partitioned, resource pragma is not emitted
2021-03-29 22:20:23 -05:00
Hanchen Ye
d3c59a543e
[Samples] implement polybench dse test script
2021-03-29 21:50:53 -05:00