Hanchen Ye
|
3d1bcb906e
|
[MultipeLevelDSE, LoopPipeline] fix bugs; [QoREstimation] fix no_touch attribute support; [LegalizeToHLSCpp] split out callable API;
|
2021-04-21 21:59:47 -05:00 |
|
Hanchen Ye
|
6b0255366a
|
[Analysis] remove AnalysisBase class, update emitter, estimator, and optimizer accordingly; [MultipleLevelDSE] update with new attributes
|
2021-04-21 03:26:37 -05:00 |
|
Hanchen Ye
|
68b1895d31
|
[HLSCpp] update definition of attributes, hope this is the final version...; [LegalizeToHLSCpp, QoREstimation] update with new attributes
|
2021-04-21 00:29:52 -05:00 |
|
Hanchen Ye
|
cb2df2dc37
|
[HLSCpp] update ScheduleAttr to TimingAttr; [QoREstimation] using HLSCpp attribute for representing resource and timing annotations
|
2021-04-19 00:11:10 -05:00 |
|
Hanchen Ye
|
2fda888955
|
[HLSCpp] use ODS for the dialect declaration
|
2021-04-16 09:58:08 -05:00 |
|
Hanchen Ye
|
a26b6d0518
|
[HLSCpp] update all attributes; add attribute parser and printer; [QoREstimation] update with ScheduleAttr
|
2021-04-16 01:07:08 -05:00 |
|
Hanchen Ye
|
c798c28717
|
[HLSCpp] start to add structure attributes for representing directives, scheduling, and resource info
|
2021-04-15 14:12:46 -05:00 |
|
Hanchen Ye
|
d1786aeed7
|
[QuantizeOnnx] update the pass name
|
2021-04-06 20:35:32 -05:00 |
|
Hanchen Ye
|
ea9467cfe5
|
[QuantizeDNNModel] add support of div op and some cast ops
|
2021-04-06 18:47:30 -05:00 |
|
Hanchen Ye
|
d14f8718d0
|
[QuantizeDNNModel] impl this pass for quantizing onnx model to 8/32 bits representation; [HLSCpp] add MulOp and AddOp
|
2021-04-06 17:25:57 -05:00 |
|
Hanchen Ye
|
d0b847c26a
|
[MultipleLevelDSE] support to specify the maximum exploration and loop parallelism; [Samples] add trmm test case, update the problem size of all benchmarks to 1024
|
2021-03-31 22:45:14 -05:00 |
|
Hanchen Ye
|
cd03a1def3
|
[MultipleLevelDSE] support to explore directive-only design space
|
2021-03-31 19:32:56 -05:00 |
|
Hanchen Ye
|
a9d93f0ed2
|
[MultipleLevelDSE] support to specify sample number; [EmitHLSCpp] stop to emit interface pragma if array is fully partitioned; [Samples] update polybench test script
|
2021-03-31 15:56:00 -05:00 |
|
Hanchen Ye
|
1d00ea9812
|
[ArrayPartition] fix a bug; add applyArrayPartition() to transform utils; [Samples] update dnn test target fpga
|
2021-03-30 15:54:53 -05:00 |
|
Hanchen Ye
|
1e1b50df06
|
[MultipleLevelDSE] support to sample pareto points and dump to mlir files
|
2021-03-29 20:09:02 -05:00 |
|
Hanchen Ye
|
6bf2845742
|
[MultipleLevelDSE] support to dump all design spaces (loops and funcs); begin of exporting pareto design points C++ files; [Samples] reconstruct the file structure
|
2021-03-29 18:53:55 -05:00 |
|
Hanchen Ye
|
58bd312356
|
[ArrayPartition] update to target FuncOp rather than ModuleOp; [MultipleLevelDSE] add resConstraint option; [Samples] update polybench benchmarks
|
2021-03-29 15:52:34 -05:00 |
|
Hanchen Ye
|
dec53d8e36
|
[SplitFunction] support to further split sub-functions into multiple single-loop-function
|
2021-03-26 22:38:07 -05:00 |
|
Hanchen Ye
|
a040ce5009
|
[PartialAffineLoopTile] support loop order opt immediately after loop tiling; [AffineLoopOrderOpt] fix a small bug; [Samples] update the ablation study script
|
2021-03-26 12:23:28 -05:00 |
|
Hanchen Ye
|
b6534145a1
|
[ArrayPartition] support to handle top functions containing multiple sub-functions
|
2021-03-23 21:58:09 -05:00 |
|
Hanchen Ye
|
b0c331f44c
|
[PartialAffineLoopTile] add appy-pipeline option
|
2021-03-23 11:53:14 -05:00 |
|
Hanchen Ye
|
1fe0475195
|
update to LLVM f178c13fa899; [ArrayPartition] fixed a bug; [Samples] remove array initialization in atax, bicg, and gesummv
|
2021-03-22 17:29:43 -05:00 |
|
Hanchen Ye
|
dc3ef5ee67
|
[ArrayPartition] resolve an issue that non-pipelined loops are not considered; [Transforms] add an applyFullyUnrollAndPartition() until; [Samples] reverse gemm, syrk, syr2k back...
|
2021-03-16 23:57:18 -05:00 |
|
Hanchen Ye
|
4c9708d239
|
[Analysis] add a getAverageTripCount() util for estimation and dse
|
2021-03-16 17:31:19 -05:00 |
|
Hanchen Ye
|
1d39291a92
|
[MultipleLevelDSE] fixed a small issue; [Samples] update the problem sizes of polybench test cases
|
2021-03-04 19:58:46 -06:00 |
|
Hanchen Ye
|
17d34f0563
|
[MultipleLevelDSE] evaluate the tile config that fully unrolls all sequential loops in the design space initialization
|
2021-03-02 18:51:48 -06:00 |
|
Hanchen Ye
|
15bc2ff8f2
|
update to LLVM c68d289
|
2021-03-02 14:31:08 -06:00 |
|
Hanchen Ye
|
05681e4f34
|
[SimplifyMemrefAccess] significantly reduce the overall complexity
|
2021-03-01 22:27:02 -06:00 |
|
Hanchen Ye
|
2a7ceaf21b
|
[MultipleLevelDSE] dse params passed in through target-spec.ini rather than pass options; update debug info emission format
|
2021-03-01 00:33:06 -06:00 |
|
Hanchen Ye
|
d1e87c7af7
|
[QoREstimation] improve estimation speed by using parallel loop information; [Transforms] update utils to apply LegalizeToHLSCpp after loop tiling; [MultipleLevelDSE] add topFunc as pass option
|
2021-02-28 23:30:57 -06:00 |
|
Hanchen Ye
|
66f932c9db
|
[LegalizeToHLSCpp] support to annotate parallel loops; [Transforms] improve the speed of SimplifyMemrefAccess and AffineStoreForward by using the parallel information
|
2021-02-28 20:52:10 -06:00 |
|
Hanchen Ye
|
6b6b07e764
|
[AffineStoreForward] rewrite this pass to improve the speed
|
2021-02-18 18:23:29 -06:00 |
|
Hanchen Ye
|
a580fe4239
|
[QoREstimation] add dep-analysis option to improve the estimation speed
|
2021-02-18 00:48:01 -06:00 |
|
Hanchen Ye
|
dbf65620df
|
[MultipleLevelDSE] support to combine loop design spaces and conduct function-level optimization
|
2021-02-17 21:45:12 -06:00 |
|
Hanchen Ye
|
5b3848291a
|
[MultipleLevelDSE] update the code structure; add FuncDesignPoint and FuncDesignSpace class; [QoREstimation] bypass the estimation of loops marked as no_touch
|
2021-02-17 12:53:24 -06:00 |
|
Hanchen Ye
|
22aea10608
|
[MultipleLevelDSE] support explore design space method
|
2021-02-13 12:53:34 -06:00 |
|
Hanchen Ye
|
9658ab6938
|
[MultipleLevelDSE] update code structure
|
2021-02-12 15:14:07 -06:00 |
|
Hanchen Ye
|
3e3435dc84
|
[MultipleLevelDSE] support ds initialization and pareto frontier update; support ds dump; remove ProfileDesignSpace pass; [PartialAffineLoopTile] become fully in-place tiling
|
2021-02-12 14:54:36 -06:00 |
|
Hanchen Ye
|
390333e5ec
|
[MultipleLevelDSE] add new DesignPoint and DesignSpace class for representing and iterating in the design space, remove the TileSpace class; [LoopPipelining] pass loop band into this pass and make optimization to happen in place
|
2021-02-12 01:25:56 -06:00 |
|
Hanchen Ye
|
d7a3456fc2
|
[MultipleLevelDSE] remove greedy dse algorithm; [ProfileDesignSpace] move this pass to Transforms folder due to dependence issue; update all CMakeLists
|
2021-02-10 20:04:46 -06:00 |
|
Hanchen Ye
|
a55495582c
|
[Transforms] use loop band as input for all loop transforms; update the method description of Utils
|
2021-02-10 08:50:56 -06:00 |
|
Hanchen Ye
|
265d888f5f
|
add pthread support in cmake; [Transforms] support apply per-loop opt strategy in Utils; [Samples] increase problem size of some polybench test cases
|
2021-02-10 01:20:00 -06:00 |
|
Hanchen Ye
|
c76938dccc
|
[Readme] update test instructions; fixed several small bugs
|
2021-02-08 01:48:59 -06:00 |
|
Hanchen Ye
|
fa2b63f958
|
rename HLSCppEstimator/Optimizer/Emitter to ScaleHLSXXX; [Transforms] op builder is no longer passed around but generated locally; [applyOptStrategy] update and optimize the implementation
|
2021-02-08 01:32:33 -06:00 |
|
Hanchen Ye
|
69ec8c0b4a
|
[Transforms] move all transformation APIs to Transforms/Utils
|
2021-02-04 20:01:50 -06:00 |
|
Hanchen Ye
|
55d7c17d02
|
[ProfileDesignSpace] factor out a new pass for profiling; distribut test cases in test/Transforms into different sub-directories
|
2021-02-04 11:56:09 -06:00 |
|
Hanchen Ye
|
80bf2ceba4
|
[Transforms] distribute transform passes into 4 different folders; move HLSKernelBufferize pass to Dialect/HLSKernel folder
|
2021-02-02 19:22:15 -06:00 |
|
Hanchen Ye
|
7eb1ce40ce
|
[MultipleLevelDSE] start to support profiling mode to profile the performance and resource utilization of the whole design space
|
2021-02-02 18:46:38 -06:00 |
|
Hanchen Ye
|
f083e3c663
|
[QoREstimation] support per-loop estimation; annotate with/without resourc-sharing dsp utilization to pipelined loops
|
2021-02-02 17:48:00 -06:00 |
|
Hanchen Ye
|
0b7fde18d9
|
support to specify targeted II for pipelined loop/function
|
2021-02-02 15:04:45 -06:00 |
|
Hanchen Ye
|
44dd4723cd
|
[QoREstimation] update depII calculation logic for improving estimation speed
|
2021-02-01 15:25:28 -06:00 |
|
Hanchen Ye
|
a96223268a
|
[QoREstimation] memory dependency are checked locally in estimateBlock() for improving estimation speed; update class structure, FuncOp is no longer a global variable but is passed in estimateFunc() as an argument
|
2021-02-01 13:15:08 -06:00 |
|
Hanchen Ye
|
06dcdde06f
|
[LoopPipelining] add applyFullyLoopUnrolling() method and rewrite this pass; [QoREstimation] update dependency related logic; mechanical rewrite from getLoopBody().front() to getBody()
|
2021-01-31 21:25:40 -06:00 |
|
Hanchen Ye
|
87035ff760
|
[SimplifyAffineIf] move redundant if op elimination into this pass; remove redundant getOperation() call
|
2021-01-30 20:43:49 -06:00 |
|
Hanchen Ye
|
8871d2fbe2
|
[MultipleLevelDSE] apply function-level optimizations through pass manager rather than customized apply() methods
|
2021-01-30 16:57:28 -06:00 |
|
Hanchen Ye
|
225f465065
|
[MultipleLevelDSE] impl of a more advanced dse algorithm; [RedundantOpRemoval] merge SimplifyMemrefAccess to this pass
|
2021-01-29 02:01:05 -06:00 |
|
Hanchen Ye
|
545b5aff53
|
[ArrayPartition] fix bugs when mux is generated; [MultipleLevelDSE] fix bugs when the innermost loop is fully tiled
|
2021-01-28 13:24:29 -06:00 |
|
Hanchen Ye
|
c137cacb59
|
update to LLVM afd483
|
2021-01-28 11:37:34 -06:00 |
|
Hanchen Ye
|
d44dfe68c2
|
[QoREstimation] update the logic of estimating resource minimum II
|
2021-01-27 20:42:53 -06:00 |
|
Hanchen Ye
|
f584b82a96
|
[QoREstimation] resolve the issue of load operation scheduling and resource-aware II estimation
|
2021-01-27 16:53:42 -06:00 |
|
Hanchen Ye
|
76af224a46
|
[QoREstimation] support a temporary approach to estimate variable trip count
|
2021-01-25 13:55:07 -06:00 |
|
Hanchen Ye
|
9cd80630e0
|
[MultipleLevelDSE] support more fine-grained tiling strategy searching
|
2021-01-23 23:25:13 -06:00 |
|
Hanchen Ye
|
7641af0c04
|
[PartialAffineLoopTile] update tiling strategy and api design; [MultipleLevelDSE] simplify debugging info emission, start of gine-grained loop tiling dse
|
2021-01-23 17:07:36 -06:00 |
|
Hanchen Ye
|
f6034a6883
|
[QoREstimation] resolve the issue when the partition index of one dimension is uncertain, the resource estimation is incorrect
|
2021-01-23 02:50:33 -06:00 |
|
Hanchen Ye
|
9b527faf0c
|
simplify scalehls-opt and scalehls-translate tool; add InitAllDialects and InitAllPasses methods; remove ablation_test_run.sh and update readme as well
|
2021-01-21 16:14:13 -06:00 |
|
Hanchen Ye
|
2489d1baf9
|
[MultipleLevelDSE] update tiling strategy, fix several bugs; [AffineLoopOrderOpt] support reverse permutation
|
2021-01-21 04:07:13 -06:00 |
|
Hanchen Ye
|
57dc6c62a5
|
[MergeAffineIf] implement of this pass
|
2021-01-20 23:19:19 -06:00 |
|
Hanchen Ye
|
d36201ce66
|
[MultipleLevelDSE] support automatic tiling strategy dse; [AffineStoreForward] fix a major bug; [PartialAffineLoopTile] fix the issue when constant trip count is not power of 2
|
2021-01-20 21:11:07 -06:00 |
|
Hanchen Ye
|
e0c3b2ad8e
|
[PartialAffineLoopTiling] factor out applyPartialAffineLoopTiling() method, reimplement the tiling strategy
|
2021-01-20 16:45:11 -06:00 |
|
Hanchen Ye
|
1e1cd2f828
|
[AffineLoopOrderOpt] complete the impl of this pass; move getLoopBandFromLeaf/Root to analysis utils, update several pass accordingly
|
2021-01-20 00:56:40 -06:00 |
|
Hanchen Ye
|
d3d13e0bd0
|
fix bugs related to dependency analysis; [AffineLoopOrderOpt] add initial impl of applyAffineLoopOrderOpt method
|
2021-01-19 15:55:36 -06:00 |
|
Hanchen Ye
|
7c1130452e
|
[AffineLoopOrderOpt] start of this pass; update test case names
|
2021-01-19 01:53:57 -06:00 |
|
Hanchen Ye
|
847d50b829
|
add copyright header; remove redundant includes and usings; move EmitHLSCpp to Tanslation directory
|
2021-01-19 01:36:00 -06:00 |
|
Hanchen Ye
|
4a594c9303
|
[LoopPipelining] recursively fully unroll all inner loops until no failure are met
|
2021-01-18 17:27:24 -06:00 |
|
Hanchen Ye
|
53c9e141e0
|
[Analysis] update getLayoutMap() method in utils
|
2021-01-12 14:01:16 -06:00 |
|
Hanchen Ye
|
9025bd5091
|
[SplitFunction] support to remove redundant copy nodes, factor out applySplitFunction() method; [LegalizeDataflow] factor out applyLegalizeDataflow() method (#20)
|
2021-01-11 15:26:00 -06:00 |
|
Hanchen Ye
|
dd57e01069
|
[QoREstimation] update getDSPMap() method name and some value names
|
2021-01-11 03:51:41 -06:00 |
|
Paul Jeong
|
5b8b38b732
|
[QoREstimation] Basic bram estimation with array partitioning
|
2021-01-11 03:42:28 -06:00 |
|
Hanchen Ye
|
e47205e779
|
[QoREstimation] when partition factor is more than 2 and partition index cannot be determined for a memory access operation, a function call will be generated and change the original dependency relationship, this patch is intended to support this mechanism
|
2021-01-11 02:48:56 -06:00 |
|
Hanchen Ye
|
996c9cff8a
|
[QoREstimation] consider loop/function interval in the DSP resource estimation
|
2021-01-10 20:48:54 -06:00 |
|
Hanchen Ye
|
9cc5f3abdc
|
[FuncPipelining] comprehensively support function pipelining in emitter, estimator, and array partition pass
|
2021-01-10 18:43:40 -06:00 |
|
Hanchen Ye
|
5bf4d7943e
|
[FuncPipelining] support function pipelining; fix some small bugs
|
2021-01-09 23:31:33 -06:00 |
|
Hanchen Ye
|
ba3ca07833
|
[QoREstimation] factor out QoREstimation.h (#20); [MultipleLevelDSE] start of auto dse
|
2021-01-08 02:20:11 -06:00 |
|
Hanchen Ye
|
9f31dd663d
|
[AffineStoreForward] factor out applyAffineStoreForward() method; [SimplifyMemrefAccess] factor out applySimplifyMemrefAccess() method
|
2021-01-08 01:13:41 -06:00 |
|
Hanchen Ye
|
07d77f7193
|
[ArrayPartition] support multi-loops array partition; factor out applyArrayPartition() method (#20)
|
2021-01-07 23:29:49 -06:00 |
|
Hanchen Ye
|
a01b440a95
|
[LoopPipelining] factor out applyLoopPipelining() method (#20)
|
2021-01-07 20:36:05 -06:00 |
|
Hanchen Ye
|
5b2af8e248
|
[AffineLoopPerfection] factor out applyAffineLoopPerfection() method (#20)
|
2021-01-07 18:38:11 -06:00 |
|
Hanchen Ye
|
94d6d57dda
|
[RemoveVariableBound] factor out applyRemoveVariableBound() method (#20)
|
2021-01-07 16:44:09 -06:00 |
|
Hanchen Ye
|
13f6f83120
|
update tabalegen description for all operations and passes
|
2021-01-04 13:51:15 -06:00 |
|
Hanchen Ye
|
1353100dad
|
[Analysis] fixed a bug in Utils
|
2021-01-03 23:35:52 -06:00 |
|
Hanchen Ye
|
cf581f2694
|
[HLSCpp] remove all uses of ArrayOp, now all of the array-related pragmas are represented with MemRefType, fixed related bugs
|
2021-01-03 22:49:34 -06:00 |
|
Hanchen Ye
|
f052331cbc
|
[QoREstimation] estimate based on memref type rather than ArrayOp attributes
|
2021-01-03 17:48:36 -06:00 |
|
Hanchen Ye
|
ff6e7f0c4c
|
[ArrayPartition] use memref layout map to represent partition type rather than ArrayOp attributes
|
2021-01-03 16:16:55 -06:00 |
|
Hanchen Ye
|
34f32ab2f2
|
[AffineLoopPerfection] add a constraint for a legal perfection; [HLSCpp] update some attribute definitions; an important flaw is introduing hlscpp.array operation causes storing to argument memrefs has semantic incorrectness. Although this flaw can be handled by hlscpp emitter, and has not caused malignant issues by now, this should be carefully considered and refactored
|
2021-01-01 13:21:12 -06:00 |
|
Hanchen Ye
|
d086c3a2e8
|
update some passes name; [RemoveVariableBound] support single result expr variable bound; [Samples] fix syrk and syr2k error
|
2020-12-30 14:27:33 -06:00 |
|
Hanchen Ye
|
98060b98fe
|
[LegalizeDataflow] support to legalize loop and other operations simultaneously, support insert-copy and min-gran option for controlling whether CopyOps are inserted and the minimum granularity of dataflow
|
2020-12-25 23:40:33 -06:00 |
|
Hanchen Ye
|
c9599e11bf
|
[QoREstimation] update UI32 attribute to I64 for meeting the requirement of estimating super large designs
|
2020-12-25 15:25:24 -06:00 |
|
Hanchen Ye
|
1b6e00b303
|
Update LLVM to latest (7d246cb)
|
2020-12-25 02:41:38 -06:00 |
|
Hanchen Ye
|
9652bee260
|
[LegalizeDataflow] update impl structure and fix bugs, support resnet18 legalization; [EmitHLSCpp] emit bool rather than ap_int<1>
|
2020-12-25 00:04:10 -06:00 |
|
Hanchen Ye
|
fef0cdc3fe
|
[LegalizeDataflow] support loop-based dataflow legalization; [SplitFunction] include live-in analysis
|
2020-12-24 14:18:14 -06:00 |
|
Hanchen Ye
|
f02955c284
|
[Readme] add onnx-mlir integration test instructions; add mnist.onnx, resnet18 test case; [EmitHLSCpp] support cast ops emission
|
2020-12-24 00:15:47 -06:00 |
|
Hanchen Ye
|
e0ca62e238
|
[EmitHLSCpp] support TensorToMemrefOp emission; fixed related bugs
|
2020-12-23 17:48:21 -06:00 |
|
Hanchen Ye
|
21347b2665
|
[LegalizeOnnx] support to legalize the output of onnx-mlir flow to pure standard/affine IR
|
2020-12-23 16:45:38 -06:00 |
|
Hanchen Ye
|
4c1cc9e4b1
|
[QoREstimator] support DSP estimation (#18)
|
2020-12-22 15:33:12 -06:00 |
|
Hanchen Ye
|
85c47e98e3
|
[QoREstimation] support function call estimation, a known issue is CallOps inside of loops are not comprehensively considered; estimation refinement for multiple loops and select op (#5); fix related bugs
|
2020-12-21 19:02:39 -06:00 |
|
Hanchen Ye
|
b0bf044c9a
|
[QoREstimation] support scheduling reverse (#5); update scheduling emission style
|
2020-12-21 11:32:25 -06:00 |
|
Hanchen Ye
|
53550db33a
|
[EmitHLSCpp] support to emit line number and schedule information; [HLSCpp] update all code related to storage_type attribute to align with Vivado 2019.1 settings
|
2020-12-20 17:52:56 -06:00 |
|
Hanchen Ye
|
1ef835680b
|
[SimplifyMemRefAccess] implement this pass; [QoREstimation] fix a bug in dep-II estimation
|
2020-12-19 21:02:27 -06:00 |
|
Hanchen Ye
|
b9af6f5355
|
[SimplifyMemRefAccess] start of this pass; [Analysis] update getLoadStoresMap method in utils
|
2020-12-19 17:36:17 -06:00 |
|
Hanchen Ye
|
6103dfba45
|
[StoreOpForward] impl of this pass; update checkSameLevel method in Analysis utils
|
2020-12-19 17:06:27 -06:00 |
|
Hanchen Ye
|
117a1bd0f4
|
[HLSCpp] eliminate PragmaOps, update ArrayOp definition; [Analysis] refactor Utils; [StoreForward] start of this pass
|
2020-12-18 23:42:41 -06:00 |
|
Hanchen Ye
|
2d943dd238
|
remove redundant includes in all files; [QoREstimation] refactor include structure
|
2020-12-18 21:16:22 -06:00 |
|
Hanchen Ye
|
cea67c2064
|
[QoREstimation] refactor the estimation from ASAP -> ALAP; [ArrayPartition] move partiton_num annotation from QoREstimation to this pass
|
2020-12-18 20:21:20 -06:00 |
|
Hanchen Ye
|
5d854f3b74
|
[QoREstimation] support profiling latency based estimation (#2)
|
2020-12-17 21:40:29 -06:00 |
|
Hanchen Ye
|
18e5f434bb
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[QoREstimation] fix bugs and incorrect behaviors in the implementation; [Passes] add some TODOs
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2020-12-17 17:05:26 -06:00 |
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Hanchen Ye
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512c842908
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[QoREstimator] thoroughly rewrite the estimator with new strategy and structure
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2020-12-17 06:10:48 -06:00 |
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Hanchen Ye
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fac1498067
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[LoopPipelining] move automatic flattening to this pass; [QoREstimation] support AffineIfOp estimation, know issue: dependencies between load/store operations should be considered in scheduling
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2020-12-14 23:41:08 -06:00 |
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Hanchen Ye
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2307b0141f
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[QoREstimation] restructure qor estimator
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2020-12-14 16:24:36 -06:00 |
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Hanchen Ye
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3f6d8e8560
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[Passes] small bugs fixed; remove HLSCppAnalyzer; insert-pipeline-pragma to loop-pipelining
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2020-12-14 13:45:13 -06:00 |
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Hanchen Ye
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31ce83be83
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[RemoveVarLoopBound] simplify impl logic; [QoREstimation] update to FuncOp pass, remove op-latency configuration
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2020-12-13 22:07:04 -06:00 |
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Hanchen Ye
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142ffadd14
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[Passes] change target operation from ModuleOp to FuncOp if possible
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2020-12-13 19:39:33 -06:00 |
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Hanchen Ye
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4e163d6edc
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[LegalizeDataflow] start of this pass; [HLSKernel] add CopyOp and lowering
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2020-12-11 00:10:58 -06:00 |
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Hanchen Ye
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0414489dfd
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[HLSKernelBufferize] impl of this pass; a known issue is the unused return tensor can not be eliminated
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2020-12-10 22:55:05 -06:00 |
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Hanchen Ye
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fa105e1746
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[HLSKernel] support tensor output for CNNOps
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2020-12-10 17:33:59 -06:00 |
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Hanchen Ye
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6b5d682df1
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[ConvertToHLSCpp] support defining top function; [EmitHLSCpp] support to emit interface pragmas according to whether the current function is top function or not
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2020-12-09 18:59:00 -06:00 |
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Hanchen Ye
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b01d469bf3
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[SplitFunction] start of split-function pass
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2020-12-09 13:04:51 -06:00 |
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Hanchen Ye
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f9bf38240e
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[ArrayPartition] impl of this pass; note that due to the insufficient AffineExpr simplification mechanism in MLIR, this pass can't handle too complicated cases
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2020-12-07 23:24:15 -06:00 |
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Hanchen Ye
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a06d34e837
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[ArrayPartition] start of array partition pass
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2020-12-07 00:03:51 -06:00 |
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Hanchen Ye
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7cb98f3a87
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[Samples] add ablation test script; update Readme; bug fix in InsertPipelinePragma
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2020-12-06 23:48:20 -06:00 |
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Hanchen Ye
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939f01cd05
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[InsertPipelinePragma] imple of this pass; support to specify the insertion level
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2020-12-05 23:53:18 -06:00 |
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Hanchen Ye
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1ba479f1e6
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[RemoveValLoopBound] impl this pass; only support single-dim variable upper bound
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2020-12-05 23:26:58 -06:00 |
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Hanchen Ye
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a57f014e6b
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[PartialAffineLoopTile] add the impl of this pass
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2020-12-05 21:18:49 -06:00 |
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Hanchen Ye
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8be4fd1211
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[AffineLoopPerfection] add this new pass: now only support sequential nested loop and constant loop bound
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2020-12-04 23:24:16 -06:00 |
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Hanchen Ye
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1fa7700ae8
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[Conversion] update all conversion passes definition to TableGen
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2020-12-04 18:34:24 -06:00 |
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Hanchen Ye
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a8a6d639e1
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[HLSKernel] CNNOps verifiers (#16)
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2020-12-01 22:44:00 -06:00 |
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Hanchen Ye
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192e3e3fd7
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[BenchmarkGen] support generating the last dense layer, and impl corresponding affine lowering (#15)
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2020-12-01 21:20:39 -06:00 |
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Hanchen Ye
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e5cd6673e7
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[BenchmarkGen] support generate CNN benchmarks without considering the last dense layer (#15)
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2020-12-01 18:31:23 -06:00 |
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Hanchen Ye
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ac4f3725d1
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[HLSKernelToAffine] impl of SyrkOp, Syr2kOp, and TrmmOp lowering
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2020-12-01 00:49:50 -06:00 |
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Hanchen Ye
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ac1c9966a8
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[HLSKernelToAffine] impl of GemmOp and SymmOp lowering
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2020-11-30 22:57:42 -06:00 |
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Hanchen Ye
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29aff5e6fb
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[HLSKernel] update BLASOps def; [HLSKernelToAffine] start of BLASOps lowering
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2020-11-30 21:02:11 -06:00 |
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Hanchen Ye
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8f1eadd913
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[HLSKernel] rewrite def of CNNOps, all input and output are bufferized now; add mergeOp; [HLSKernelToAffine] update a compact lowering impl; [HLSKernelToLinalg] removed because this will not bring us significant simplification/convenience
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2020-11-30 12:39:41 -06:00 |
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Hanchen Ye
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ba0b949477
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[HLSKernel] add BLASOps and ISPOps
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2020-11-18 22:56:07 -06:00 |
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Hanchen Ye
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c6ce8991d7
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[HLSKernelToLinalg] add to linalg converter
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2020-11-18 20:17:17 -06:00 |
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Hanchen Ye
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2fb35bdc68
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[EmitHLSCpp] start of supporting scf ops; [scalehls-gen] start of benchmark generation
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2020-11-05 18:20:17 -06:00 |
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Hanchen Ye
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cf4e36e626
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[HLSKernelToAffine] impl lowering of maxpool, relu, gemm ops
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2020-11-05 15:48:47 -06:00 |
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Hanchen Ye
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6adc65da7a
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[HLSKernel] add maxpool, relu, and gemm operations
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2020-11-04 22:40:29 -06:00 |
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Hanchen Ye
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41e3747b85
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[HLSKernel] start of HLSKernel ops lowering; add ConvOp
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2020-11-01 21:27:53 -06:00 |
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Hanchen Ye
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eb34f4ee7b
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[HLSKernel] mechanical rename Benchmark to HLSKernel
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2020-10-28 22:20:37 -05:00 |
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Hanchen Ye
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da05ac2d84
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[Benchmark] start of implementing benchmark dialect and benchmark-to-affine lowering
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2020-10-27 18:36:17 -05:00 |
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Hanchen Ye
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6bbb1be13c
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[HLSCppEmitter] emit ArrayOp and loop/func pragmas; compatible with Vivado HLS 2019.1 for now.
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2020-10-10 23:35:21 -05:00 |