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Fix test cases

This commit is contained in:
Hanchen Ye 2022-01-21 03:14:04 -06:00
parent f354a8a3a6
commit 153941cd33
5 changed files with 12 additions and 18 deletions
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18
lib/Dialect/HLSCpp/HLSCpp.cpp
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@ -55,8 +55,8 @@ Attribute ResourceAttr::parse(AsmParser &p, Type type) {
} }
void ResourceAttr::print(AsmPrinter &p) const { void ResourceAttr::print(AsmPrinter &p) const {
p << getMnemonic() << "<lut=" << getLut() << ", dsp=" << getDsp() p << "<lut=" << getLut() << ", dsp=" << getDsp() << ", bram=" << getBram()
<< ", bram=" << getBram() << ", nonShareDsp=" << getNonShareDsp() << ">"; << ", nonShareDsp=" << getNonShareDsp() << ">";
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@ -74,8 +74,8 @@ Attribute TimingAttr::parse(AsmParser &p, Type type) {
} }
void TimingAttr::print(AsmPrinter &p) const { void TimingAttr::print(AsmPrinter &p) const {
p << getMnemonic() << "<" << getBegin() << " -> " << getEnd() << ", " p << "<" << getBegin() << " -> " << getEnd() << ", " << getLatency() << ", "
<< getLatency() << ", " << getInterval() << ">"; << getInterval() << ">";
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@ -102,7 +102,7 @@ Attribute LoopInfoAttr::parse(AsmParser &p, Type type) {
} }
void LoopInfoAttr::print(AsmPrinter &p) const { void LoopInfoAttr::print(AsmPrinter &p) const {
p << getMnemonic() << "<flattenTripCount=" << getFlattenTripCount() p << "<flattenTripCount=" << getFlattenTripCount()
<< ", iterLatency=" << getIterLatency() << ", minII=" << getMinII() << ">"; << ", iterLatency=" << getIterLatency() << ", minII=" << getMinII() << ">";
} }
@ -137,9 +137,9 @@ Attribute LoopDirectiveAttr::parse(AsmParser &p, Type type) {
} }
void LoopDirectiveAttr::print(AsmPrinter &p) const { void LoopDirectiveAttr::print(AsmPrinter &p) const {
p << getMnemonic() << "<pipeline=" << getPipeline() p << "<pipeline=" << getPipeline() << ", targetII=" << getTargetII()
<< ", targetII=" << getTargetII() << ", dataflow=" << getDataflow() << ", dataflow=" << getDataflow() << ", flatten=" << getFlatten()
<< ", flatten=" << getFlatten() << ", parallel=" << getParallel() << ">"; << ", parallel=" << getParallel() << ">";
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@ -170,7 +170,7 @@ Attribute FuncDirectiveAttr::parse(AsmParser &p, Type type) {
} }
void FuncDirectiveAttr::print(AsmPrinter &p) const { void FuncDirectiveAttr::print(AsmPrinter &p) const {
p << getMnemonic() << "<pipeline=" << getPipeline() p << "<pipeline=" << getPipeline()
<< ", targetInterval=" << getTargetInterval() << ", targetInterval=" << getTargetInterval()
<< ", dataflow=" << getDataflow() << ", topFunc=" << getTopFunc() << ">"; << ", dataflow=" << getDataflow() << ", topFunc=" << getTopFunc() << ">";
} }

2
test/Conversion/LegalizeToHLSCpp/test_assign.mlir
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@ -5,7 +5,7 @@
func @test_assign(%arg0: f32, %arg1: memref<16xf32, 1>) -> (f32, memref<16xf32, 1>, i32, memref<2x2xi32, 1>) { func @test_assign(%arg0: f32, %arg1: memref<16xf32, 1>) -> (f32, memref<16xf32, 1>, i32, memref<2x2xi32, 1>) {
%c11_i32 = arith.constant 11 : i32 %c11_i32 = arith.constant 11 : i32
%cst = arith.constant dense<[[11, 0], [0, -42]]> : tensor<2x2xi32> %cst = arith.constant dense<[[11, 0], [0, -42]]> : tensor<2x2xi32>
%cst_memref = memref.buffer_cast %cst : memref<2x2xi32, 1> %cst_memref = bufferization.to_memref %cst : memref<2x2xi32, 1>
// CHECK: %1 = "hlscpp.assign"(%arg0) : (f32) -> f32 // CHECK: %1 = "hlscpp.assign"(%arg0) : (f32) -> f32
// CHECK: %2 = "hlscpp.assign"(%arg1) : (memref<16xf32, 1>) -> memref<16xf32, 1> // CHECK: %2 = "hlscpp.assign"(%arg1) : (memref<16xf32, 1>) -> memref<16xf32, 1>

2
test/Conversion/QuantizeOnnx.mlir
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@ -164,7 +164,7 @@ module {
call @dataflow4(%cst_0, %4, %arg2, %3) : (f32, memref<1x6x14x14xf32>, memref<16x6x5x5xf32>, memref<1x16x5x5xf32>) -> () call @dataflow4(%cst_0, %4, %arg2, %3) : (f32, memref<1x6x14x14xf32>, memref<16x6x5x5xf32>, memref<1x16x5x5xf32>) -> ()
call @dataflow3(%3, %cst_0, %2, %arg3, %cst, %arg4) : (memref<1x16x5x5xf32>, f32, memref<1x120xf32>, memref<120x400xf32>, f32, memref<120xf32>) -> () call @dataflow3(%3, %cst_0, %2, %arg3, %cst, %arg4) : (memref<1x16x5x5xf32>, f32, memref<1x120xf32>, memref<120x400xf32>, f32, memref<120xf32>) -> ()
call @dataflow2(%2, %cst_0, %1, %arg5, %cst, %arg6) : (memref<1x120xf32>, f32, memref<1x84xf32>, memref<84x120xf32>, f32, memref<84xf32>) -> () call @dataflow2(%2, %cst_0, %1, %arg5, %cst, %arg6) : (memref<1x120xf32>, f32, memref<1x84xf32>, memref<84x120xf32>, f32, memref<84xf32>) -> ()
%5 = memref.buffer_cast %cst_1 : memref<10xf32> %5 = bufferization.to_memref %cst_1 : memref<10xf32>
call @dataflow1(%1, %cst_0, %0, %arg7, %cst, %5) : (memref<1x84xf32>, f32, memref<1x10xf32>, memref<10x84xf32>, f32, memref<10xf32>) -> () call @dataflow1(%1, %cst_0, %0, %arg7, %cst, %5) : (memref<1x84xf32>, f32, memref<1x10xf32>, memref<10x84xf32>, f32, memref<10xf32>) -> ()
return %0 : memref<1x10xf32> return %0 : memref<1x10xf32>
} }

6
test/EmitHLSCpp/test_signature.mlir
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@ -43,12 +43,6 @@ func @test_signature(
// CHECK: int [[VAL_26:.*]] = 16; // CHECK: int [[VAL_26:.*]] = 16;
%0 = memref.dim %arg7, %c0 : memref<16x8xf32> %0 = memref.dim %arg7, %c0 : memref<16x8xf32>
// CHECK: int [[VAL_28:.*]] = 2;
%3 = rank %arg7 : memref<16x8xf32>
// CHECK: int [[VAL_29:.*]] = 2;
%4 = rank %arg8 : tensor<16x8xf32>
// CHECK: *[[VAL_13:.*]] = [[VAL_0:.*]]; // CHECK: *[[VAL_13:.*]] = [[VAL_0:.*]];
// CHECK: for (int iv0 = 0; iv0 < 16; ++iv0) { // CHECK: for (int iv0 = 0; iv0 < 16; ++iv0) {
// CHECK: for (int iv1 = 0; iv1 < 8; ++iv1) { // CHECK: for (int iv1 = 0; iv1 < 8; ++iv1) {

2
test/EmitHLSCpp/test_tensor.mlir
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@ -30,7 +30,7 @@ func @test_tensor_load_store(%arg0: memref<16x8xi32>) {
// CHECK: [[VAL_0:.*]][iv0][iv1] = [[ARG_0:.*]][iv0][iv1]; // CHECK: [[VAL_0:.*]][iv0][iv1] = [[ARG_0:.*]][iv0][iv1];
// CHECK: } // CHECK: }
// CHECK: } // CHECK: }
%0 = memref.tensor_load %arg0 : memref<16x8xi32> %0 = bufferization.to_tensor %arg0 : memref<16x8xi32>
// CHECK: for (int iv0 = 0; iv0 < 16; ++iv0) { // CHECK: for (int iv0 = 0; iv0 < 16; ++iv0) {
// CHECK: for (int iv1 = 0; iv1 < 8; ++iv1) { // CHECK: for (int iv1 = 0; iv1 < 8; ++iv1) {