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MachineSink-call.ll
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[NVPTX] Annotate call machine instructions as calls.
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2016-02-17 17:46:50 +00:00 |
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MachineSink-convergent.ll
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[NVPTX] Test that MachineSink won't sink across llvm.cuda.syncthreads.
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2016-02-17 17:46:52 +00:00 |
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TailDuplication-convergent.ll
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Don't tail-duplicate blocks that contain convergent instructions.
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2016-02-22 17:50:52 +00:00 |
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access-non-generic.ll
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[NVPTX] Adds a new address space inference pass.
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2016-03-20 20:59:20 +00:00 |
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add-128bit.ll
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Revert revisions r234755, r234759, r234760
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2015-04-13 17:47:15 +00:00 |
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addrspacecast-gvar.ll
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[NVPTX] Handle addrspacecast constant expressions in aggregate initializers
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2015-04-28 17:18:30 +00:00 |
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addrspacecast.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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aggr-param.ll
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…
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alias.ll
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[CUDA] Die gracefully when trying to output an LLVM alias.
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2016-01-23 21:12:20 +00:00 |
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annotations.ll
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…
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arg-lowering.ll
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…
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arithmetic-fp-sm20.ll
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…
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arithmetic-int.ll
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[NVPTX] expand mul_lohi to mul_lo and mul_hi
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2016-01-22 19:47:26 +00:00 |
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atomics.ll
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…
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bfe.ll
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…
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branch-fold.ll
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Roll forward r242871
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2015-07-29 18:59:09 +00:00 |
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bug17709.ll
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…
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bug21465.ll
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[NVPTX] run SROA after NVPTXFavorNonGenericAddrSpaces
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2015-06-09 00:05:56 +00:00 |
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bug22246.ll
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[NVPTX] Generate a more optimal sequence for select of i1
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2015-01-26 19:52:20 +00:00 |
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bug22322.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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bug26185.ll
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[NVPTX] Handle ldg created from sign-/zero-extended load
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2016-04-05 12:38:01 +00:00 |
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bypass-div.ll
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Use 32-bit divides instead of 64-bit divides where possible.
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2015-08-11 22:16:34 +00:00 |
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call-with-alloca-buffer.ll
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Add NVPTXPeephole pass to reduce unnecessary address cast
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2015-06-24 20:20:16 +00:00 |
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callchain.ll
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…
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calling-conv.ll
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…
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combine-min-max.ll
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[NVPTX] Let NVPTX backend detect integer min and max patterns.
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2015-08-26 23:22:02 +00:00 |
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compare-int.ll
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…
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constant-vectors.ll
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…
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convergent-mir-call.ll
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[NVPTX] Use different, convergent MIs for convergent calls.
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2016-03-01 19:24:03 +00:00 |
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convert-fp.ll
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…
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convert-int-sm20.ll
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…
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ctlz.ll
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…
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ctpop.ll
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cttz.ll
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debug-file-loc.ll
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testcase gardening: update the emissionKind enum to the new syntax. (NFC)
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2016-04-01 00:16:49 +00:00 |
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disable-opt.ll
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[NVPTX] Disable performance optimizations when OptLevel==None
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2016-02-04 04:15:36 +00:00 |
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div-ri.ll
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…
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envreg.ll
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extloadv.ll
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[NVPTX] expand extload/truncstore for vectors of floats
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2015-07-01 21:32:42 +00:00 |
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fast-math.ll
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…
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fma-assoc.ll
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SelectionDAG: Prefer to combine multiplication with less uses for fma
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2015-08-11 19:21:46 +00:00 |
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fma-disable.ll
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…
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fma.ll
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…
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fp-contract.ll
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…
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fp-literals.ll
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…
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fp16.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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function-align.ll
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[NVPTXAsmPrinter] do not print .align on function headers
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2015-03-12 01:50:30 +00:00 |
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generic-to-nvvm.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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global-addrspace.ll
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[NVPTX] Allow undef value as global initializer
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2015-08-22 05:40:26 +00:00 |
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global-ctor-empty.ll
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[CUDA] Die if we ask the NVPTX backend to emit a global ctor/dtor.
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2016-01-30 01:07:38 +00:00 |
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global-ctor.ll
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[CUDA] Die if we ask the NVPTX backend to emit a global ctor/dtor.
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2016-01-30 01:07:38 +00:00 |
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global-dtor.ll
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[CUDA] Die if we ask the NVPTX backend to emit a global ctor/dtor.
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2016-01-30 01:07:38 +00:00 |
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global-ordering.ll
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…
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global-visibility.ll
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[NVPTX] Do not emit .hidden or .protected directives as they are not allowed by PTX.
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2016-01-15 23:57:53 +00:00 |
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globals_init.ll
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The constant initialization for globals in NVPTX is generated as an
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2015-06-09 16:29:34 +00:00 |
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globals_lowering.ll
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Force relocation mode to be default, regardless of what is passed to the backend.
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2015-06-30 17:18:00 +00:00 |
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gvar-init.ll
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…
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half.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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i1-global.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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i1-int-to-fp.ll
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i1-param.ll
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i8-param.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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imad.ll
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…
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implicit-def.ll
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inline-asm.ll
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intrin-nocapture.ll
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Reapply 239795 - [InstCombine] Propagate non-null facts to call parameters
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2015-06-16 20:24:25 +00:00 |
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intrinsic-old.ll
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…
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intrinsics.ll
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[NVPTX] Added missing test case for llvm.nvvm.sqrt.f NVPTX intrinsic
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2015-06-23 18:22:17 +00:00 |
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isspacep.ll
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…
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ld-addrspace.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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ld-generic.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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ldparam-v4.ll
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…
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ldu-i8.ll
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…
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ldu-ldg.ll
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…
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ldu-reg-plus-offset.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
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2015-02-27 19:29:02 +00:00 |
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lit.local.cfg
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…
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load-sext-i1.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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load-with-non-coherent-cache.ll
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[NVPTX] Use LDG for pointer induction variables.
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2015-08-05 23:11:57 +00:00 |
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local-stack-frame.ll
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[NVPTX] Move NVPTXPeephole after NVPTXPrologEpilogPass
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2015-07-01 20:08:06 +00:00 |
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loop-vectorize.ll
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[NVPTX] declare no vector registers
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2015-07-10 04:31:56 +00:00 |
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lower-aggr-copies.ll
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Revert "Change memcpy/memset/memmove to have dest and source alignments."
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2015-11-19 05:56:52 +00:00 |
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lower-alloca.ll
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Add NVPTXLowerAlloca pass to convert alloca'ed memory to local address
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2015-06-17 22:31:02 +00:00 |
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lower-kernel-ptr-arg.ll
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[NVPTX] convert pointers in byval kernel arguments to global
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2015-07-31 21:44:14 +00:00 |
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machine-sink.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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managed.ll
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…
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misaligned-vector-ldst.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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module-inline-asm.ll
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…
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mulwide.ll
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…
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noduplicate-syncthreads.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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nounroll.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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nvcl-param-align.ll
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…
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nvvm-reflect-module-flag.ll
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[NVPTX] Read __CUDA_FTZ from module flags in NVVMReflect.
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2016-04-01 01:09:07 +00:00 |
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nvvm-reflect.ll
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Add support for __nvvm_reflect changes in libdevice in CUDA-7.0
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2015-03-19 17:05:35 +00:00 |
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param-align.ll
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…
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pr13291-i1-store.ll
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[NVPTX] roll forward r239082
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2015-06-04 21:28:26 +00:00 |
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pr16278.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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pr17529.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
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2015-02-27 19:29:02 +00:00 |
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refl1.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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reg-copy.ll
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[NVPTX] allow register copy between float and int
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2015-08-01 18:02:12 +00:00 |
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rotate.ll
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…
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rsqrt.ll
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sched1.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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sched2.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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sext-in-reg.ll
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…
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sext-params.ll
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…
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shift-parts.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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simple-call.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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sm-version-20.ll
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…
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sm-version-21.ll
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…
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sm-version-30.ll
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[NVPTX] Associate a minimum PTX version for each SM architecture
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2015-03-30 19:30:55 +00:00 |
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sm-version-32.ll
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[NVPTX] Associate a minimum PTX version for each SM architecture
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2015-03-30 19:30:55 +00:00 |
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sm-version-35.ll
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[NVPTX] Associate a minimum PTX version for each SM architecture
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2015-03-30 19:30:55 +00:00 |
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sm-version-37.ll
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[NVPTX] Associate a minimum PTX version for each SM architecture
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2015-03-30 19:30:55 +00:00 |
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sm-version-50.ll
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[NVPTX] Associate a minimum PTX version for each SM architecture
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2015-03-30 19:30:55 +00:00 |
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sm-version-52.ll
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[NVPTX] Associate a minimum PTX version for each SM architecture
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2015-03-30 19:30:55 +00:00 |
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sm-version-53.ll
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[NVPTX] Associate a minimum PTX version for each SM architecture
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2015-03-30 19:30:55 +00:00 |
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st-addrspace.ll
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…
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st-generic.ll
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…
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surf-read-cuda.ll
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[NVPTX] roll forward r239082
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2015-06-04 21:28:26 +00:00 |
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surf-read.ll
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…
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surf-write-cuda.ll
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…
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surf-write.ll
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…
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symbol-naming.ll
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Have a single way for creating unique value names.
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2015-11-22 00:16:24 +00:00 |
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tex-read-cuda.ll
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[NVPTX] roll forward r239082
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2015-06-04 21:28:26 +00:00 |
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tex-read.ll
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…
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texsurf-queries.ll
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tuple-literal.ll
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…
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vec-param-load.ll
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…
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vec8.ll
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…
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vector-args.ll
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vector-call.ll
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Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI
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2015-08-10 19:01:27 +00:00 |
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vector-compare.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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vector-global.ll
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vector-loads.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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vector-return.ll
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vector-select.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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vector-stores.ll
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weak-global.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
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weak-linkage.ll
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c79979299a