| .. |
|
AArch64
|
[AArch64] Implement vector splitting on UADDV.
|
2015-10-16 15:38:25 +00:00 |
|
AMDGPU
|
DAGCombiner: Don't stop finding better chain on 2 aliases
|
2015-10-13 00:49:00 +00:00 |
|
ARM
|
[ARM] Make sure we do not dereference the end iterator when accessing debug
|
2015-10-15 00:41:26 +00:00 |
|
BPF
|
[bpf] Do not expand UNDEF SDNode during insn selection lowering
|
2015-10-08 18:52:40 +00:00 |
|
CPP
|
Fix CPP Backend for GEP API changes for opaque pointer types
|
2015-09-08 18:42:29 +00:00 |
|
Generic
|
[Hexagon] Reverting test file change.
|
2015-10-17 01:58:51 +00:00 |
|
Hexagon
|
[Hexagon] Split double registers
|
2015-10-16 20:38:54 +00:00 |
|
Inputs
|
DI: Require subprogram definitions to be distinct
|
2015-08-28 20:26:49 +00:00 |
|
MIR
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
MSP430
|
…
|
|
|
Mips
|
[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
|
2015-10-15 14:34:23 +00:00 |
|
NVPTX
|
[NVPTX] Let NVPTX backend detect integer min and max patterns.
|
2015-08-26 23:22:02 +00:00 |
|
PowerPC
|
[MachO] Stop generating *coal* sections.
|
2015-10-15 05:28:38 +00:00 |
|
SPARC
|
Fix assert when emitting llvm.pow.f86.
|
2015-10-09 21:36:19 +00:00 |
|
SystemZ
|
[SystemZ] CodeGen/SystemZ/asm-18.ll run with -verify-machineinstrs
|
2015-10-10 07:20:23 +00:00 |
|
Thumb
|
[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
|
2015-10-05 14:49:54 +00:00 |
|
Thumb2
|
[ARM] Use correct half-precision functions in EABI mode
|
2015-10-07 16:58:49 +00:00 |
|
WebAssembly
|
WebAssembly: don't omit dead vregs from locals
|
2015-10-17 00:25:38 +00:00 |
|
WinEH
|
[WinEH] Fix eh.exceptionpointer intrinsic lowering
|
2015-10-17 00:08:08 +00:00 |
|
X86
|
[X86][XOP] Add VPROT rotate by immediate intrinsics tests
|
2015-10-17 18:21:53 +00:00 |
|
XCore
|
[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
|
2015-09-11 03:22:04 +00:00 |
4773763bb0