hanchenye-llvm-project/llvm/test/CodeGen/MIR
Tobias Grosser 8cf785f6b1 Revert "[IfConversion] Keep the CFG updated incrementally in IfConvertTriangle"
The reverted change introdued assertions ala:

"MachineBasicBlock::succ_iterator
llvm::MachineBasicBlock::removeSuccessor(succ_iterator, bool): Assertion
`I != Successors.end() && "Not a current successor!"'

Mikael, the original committer, wrote me that he is working on a fix, but that
it likely will take some time to get this resolved. As this bug is one of the
last two issues that keep the AOSP buildbot from turning green, I revert the
original commit r302876.

I am looking forward to see this recommitted after the assertion has been
resolved.

llvm-svn: 304128
2017-05-29 06:12:18 +00:00
..
AArch64 MIR: parse & print the atomic parts of a MachineMemOperand. 2017-02-13 22:14:08 +00:00
AMDGPU AMDGPU: Remove legacy bfe intrinsics 2017-04-03 18:08:08 +00:00
ARM Revert "[IfConversion] Keep the CFG updated incrementally in IfConvertTriangle" 2017-05-29 06:12:18 +00:00
Generic Move machine-cse-physreg.mir to test/CodeGen/Thumb 2017-05-24 17:20:47 +00:00
Hexagon
Mips
NVPTX
PowerPC
X86 Add extra operand to CALLSEQ_START to keep frame part set up previously 2017-05-09 13:35:13 +00:00
README

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.