37 lines
921 B
TableGen
37 lines
921 B
TableGen
//=- Mips64r6InstrInfo.td - Mips64r6 Instruction Information -*- tablegen -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes Mips64r6 instructions.
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//
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//===----------------------------------------------------------------------===//
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// Notes about removals/changes from MIPS32r6:
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// Reencoded: dclo, dclz
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// Reencoded: lld, scd
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// Removed: daddi
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// Removed: ddiv, ddivu, dmult, dmultu
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// Removed: div, divu
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// Removed: ldl, ldr, ldle, ldre, sdl, sdr, sdle, sdre
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def DAHI;
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def DALIGN;
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def DATI;
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def DAUI;
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def DBITSWAP;
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def DDIV;
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def DDIVU;
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// def DLSA; // See MSA
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def DMOD;
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def DMODU;
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def DMUH;
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def DMUHU;
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def DMUL_R6; // Not to be confused with the old mul
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def DMULU;
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def LDPC;
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