7f3f05e0b7
The access sequence for global variables in the medium and large code models use 2 instructions to add an offset to the toc-pointer. If the offset fits whithin 16-bits then the instruction that sets the high 16 bits is redundant. This patch adds the --toc-optimize option, (on by default) and enables rewriting of 2 instruction global variable accesses into 1 when the offset from the TOC-pointer to the variable (or .got entry) fits in 16 signed bits. eg addis %r3, %r2, 0 --> nop addi %r3, %r3, -0x8000 --> addi %r3, %r2, -0x8000 This rewriting can be disabled with the --no-toc-optimize flag Differential Revision: https://reviews.llvm.org/D49237 llvm-svn: 342602 |
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| .. | ||
| AArch64.cpp | ||
| AMDGPU.cpp | ||
| ARM.cpp | ||
| AVR.cpp | ||
| Hexagon.cpp | ||
| Mips.cpp | ||
| MipsArchTree.cpp | ||
| PPC.cpp | ||
| PPC64.cpp | ||
| RISCV.cpp | ||
| SPARCV9.cpp | ||
| X86.cpp | ||
| X86_64.cpp | ||