Rafael Espindola 5d94634c13 No need to run llvm-as. NFC. ... llvm-svn: 224859		2014-12-26 16:42:47 +00:00
..
AArch64	Lower multiply-negate operation to mneg on AArch64	2014-12-22 13:38:58 +00:00
ARM	[ARM] Don't break alignment when combining base updates into load/stores.	2014-12-23 06:07:31 +00:00
CPP	…
Generic	CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.	2014-12-19 20:50:07 +00:00
Hexagon	[Hexagon] Reapplying 224775 load words.	2014-12-23 20:02:16 +00:00
Inputs	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
MSP430	…
Mips	[mips][microMIPS] Fix bugs related to atomic SC/LL instructions	2014-12-18 16:39:29 +00:00
NVPTX	[NVPTX] Fix bugs related to isSingleValueType	2014-12-17 17:59:04 +00:00
PowerPC	No need to run llvm-as. NFC.	2014-12-26 16:42:47 +00:00
R600	Enable (sext x) == C --> x == (trunc C) combine	2014-12-21 16:48:42 +00:00
SPARC	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
SystemZ	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Thumb	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Thumb2	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
X86	Masked Load/Store - Changed the order of parameters in intrinsics.	2014-12-25 07:49:20 +00:00
XCore	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00