49 lines
1.2 KiB
Makefile
49 lines
1.2 KiB
Makefile
# This file is intended to be included from each subdirectory
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# makefile.
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ifeq ($(Dir),)
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$(error "No Dir variable defined.")
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endif
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ifeq ($(DebugMake),1)
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$(info MAKE: $(Dir): Processing subdirectory)
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endif
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# Expand template for each configuration and architecture.
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# FIXME: This level of logic should be in primary Makefile?
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ifeq ($(OnlyConfigs),)
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ConfigsToTraverse := $(Configs)
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else
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ConfigsToTraverse := $(OnlyConfigs)
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endif
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ifeq ($(OnlyArchs),)
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ArchsToTraverse := $(Archs)
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else
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ArchsToTraverse := $(OnlyArchs)
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endif
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# If we are only targetting a single arch, only traverse that.
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ifneq ($(TargetArch),)
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ArchsToTraverse := $(filter $(TargetArch), $(ArchsToTraverse))
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endif
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$(foreach config,$(ConfigsToTraverse), \
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$(foreach arch,$(ArchsToTraverse), \
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$(eval $(call CNA_subdir_template,$(config),$(arch),$(Dir)))))
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###
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# Include child makefile fragments
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# Evaluate this now so we do not have to worry about order of
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# evaluation.
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SubDirsList := $(SubDirs:%=$(Dir)/%)
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ifeq ($(SubDirsList),)
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else
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ifeq ($(DebugMake),1)
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$(info MAKE: Descending into subdirs: $(SubDirsList))
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endif
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$(foreach subdir,$(SubDirsList),$(eval include $(subdir)/Makefile.mk))
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endif
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